# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 123
Section 5. Instruction Descriptions
Instruction
Descriptions
5
BCLR
Bit Clear f
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} BCLR{.B} f, #bit4
Operands: f ∈ [0 ... 8191] for byte operation
f ∈ [0 ... 8190] (even only) for word operation
bit4 ∈ [0 ... 7] for byte operation
bit4 ∈ [0 ... 15] for byte operation
Operation: 0 → f<bit4>
Status Affected: None
Encoding: 1010 1001 bbbf ffff ffff fffb
Description: Clear the bit in the file register f specified by ‘bit4’. Bit numbering begins
with the Least Significant bit (bit 0) and advances to the Most Significant
bit (bit 7 for byte operations, bit 15 for word operations).
The ‘b’ bits select value bit4 of the bit position to be cleared.
The ‘f’ bits select the address of the file register.
Note 1: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
2: When this instruction operates in Word mode, the file register
address must be word-aligned.
3: When this instruction operates in Byte mode, ‘bit4’ must be
between 0 and 7.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Example 1:
BCLR.B 0x800, #0x7 ; Clear bit 7 in 0x800
Before
Instruction
After
Instruction
Data 0800 66EF Data 0800 666F
SR 0000 SR 0000
Example 2:
BCLR 0x400, #0x9 ; Clear bit 9 in 0x400
Before
Instruction
After
Instruction
Data 0400 AA55 Data 0400 A855
SR 0000 SR 0000

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