# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 262 © 2005-2011 Microchip Technology Inc.
IOR
Inclusive OR Wb and Short Literal
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} IOR{.B} Wb, #lit5, Wd
[Wd]
[Wd++]
[Wd--]
[++Wd]
[--Wd]
Operands: Wb ∈ [W0 ... W15]
lit5 ∈ [0 ... 31]
Wd ∈ [W0 ... W15]
Operation: (Wb).IOR.lit5 → Wd
Status Affected: N, Z
Encoding: 0111 0www
wBqq qddd d11k kkkk
Description: Compute the logical inclusive OR operation of the contents of the base
register Wb and the 5-bit literal operand and place the result in the
destination register Wd. Register direct addressing must be used for Wb.
Either register direct or indirect addressing may be used for Wd.
The ‘w’ bits select the address of the base register.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘q’ bits select the destination Address mode.
The ‘d’ bits select the destination register.
The ‘k’ bits provide the literal operand, a five-bit integer number.
Note: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
Words: 1
Cycles: 1
Example 1:
IOR.B W1, #0x5, [W9++] ; IOR W1 and 0x5 (Byte mode)
; Store to [W9]
; Post-increment W9
Before
Instruction
After
Instruction
W1 AAAA W1 AAAA
W9 2000 W9 2001
Data 2000 0000 Data 2000 00AF
SR 0000 SR 0008 (N = 1)
Example 2:
IOR W1, #0x0, W9 ; IOR W1 with 0x0 (Word mode)
; Store to W9
Before
Instruction
After
Instruction
W1 0000 W1 0000
W9 A34D W9 0000
SR 0000 SR 0002 (Z = 1)

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