# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Interrupts

- 1
- 2
- 3
- 4
…
- 25
- 26

PIC24F Family Reference Manual
DS39707A-page 8-2 Advance Information © 2006 Microchip Technology Inc.
8.1 INTRODUCTION
The PIC24F interrupt controller module reduces the numerous peripheral interrupt request
signals to a single interrupt request signal to the PIC24F CPU and has the following features:
• Up to 8 processor exceptions and software traps
• 7 user-selectable priority levels
• Interrupt Vector Table (IVT) with up to 118 vectors
• A unique vector for each interrupt or exception source
• Fixed priority within a specified user priority level
• Alternate Interrupt Vector Table (AIVT) for debug support
• Fixed interrupt entry and return latencies
8.1.1 Interrupt Vector Table
The Interrupt Vector Table (IVT) resides in program memory, starting at location 0x000004. The
IVT contains 126 vectors, consisting of 8 non-maskable trap vectors, plus up to 118 sources of
interrupt. Trap vector details are summarized in Table 8-1. In general, each interrupt source has
its own vector. Each interrupt vector contains a 24-bit wide address. The value programmed into
each interrupt vector location is the starting address of the associated Interrupt Service Routine
(ISR).
8.1.2 Alternate Interrupt Vector Table
The Alternate Interrupt Vector Table (AIVT) is located after the IVT, as shown in Figure 8-1.
Access to the AIVT is provided by the ALTIVT control bit (INTCON2<15>). If the ALTIVT bit is
set, all interrupt and exception processes will use the alternate vectors instead of the default
vectors. The alternate vectors are organized in the same manner as the default vectors.
The AIVT supports emulation and debugging efforts by providing a means to switch between
an application and a support environment without requiring the interrupt vectors to be
reprogrammed. Sometimes a system may have two applications — a bootloader application and
a main application. In this scenario, the bootloader can use one set of vectors and the main
application can use the other set.
This feature also enables switching between applications for evaluation of different software
algorithms at run time. If the AIVT is not needed, the AIVT should be programmed with the same
addresses used in the IVT.
8.1.3 Reset Sequence
A device Reset is not a true exception because the interrupt controller is not involved in the Reset
process. The PIC24F device clears its registers in response to a Reset which forces the PC to
zero. The processor then begins program execution at location 0x000000. The user programs a
GOTO instruction at the Reset address, which redirects program execution to the appropriate
start-up routine. Refer to Section 7. “Reset” for more information on Resets.
Note: Any unimplemented or unused vector locations in the IVT and AIVT should be
programmed with the address of a default interrupt handler routine that contains a
RESET instruction.

- 1
- 2
- 3
- 4
…
- 25
- 26