# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- 10-Bit ADC

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© 2010 Microchip Technology Inc. Preliminary DS39737A-page 49-51
Section 49. 10-Bit ADC with 4 Simultaneous Conversions
10-Bit ADC with
4 Simultaneous
Conversions
49
49.12 TRANSFER FUNCTIONS
49.12.1 10-Bit
The ideal transfer function of the ADC module is shown in Figure 49-27. The difference of the
input voltages (V
INH – VINL) is compared to the reference (AV DD – AVSS).
• The first code transition (A) occurs when the input voltage is AV
DD – AVSS/2048 or 0.5 LSb.
• The 00 0000 0001 code is centered at AV
DD – AVSS/1024 or 1.0 LSb (B).
• The 10 0000 0000 code is centered at 512 * (AVDD – AVSS)/1024 (C).
• An input voltage less than 1 * (AVDD – AVSS)/2048 converts as 00 0000 0000 (D).
• An input greater than 2045 * (AV
DD – AVSS)/2048 converts as 11 1111 1111 (E).
Figure 49-27: 10-bit ADC Module Transfer Function
49.13 ADC ACCURACY/ERROR
Refer to the “Electrical Characteristics” chapter of the specific device data sheet for information
on the INL, DNL, gain and offset errors. In addition, see Section 49.19 “Related Application
Notes” for a list of documents that discuss ADC accuracy.
49.14 CONNECTION CONSIDERATIONS
Since the analog inputs employ ESD protection, they have diodes to V DD and VSS. As a result,
the analog input must be between V
DD and VSS. If the input voltage exceeds this range by greater
than 0.3 V (either direction), one of the diodes becomes forward biased, and it may damage the
device if the input current specification is exceeded.
An external RC filter is sometimes added for anti-aliasing of the input signal. The R component
should be selected to ensure that the sampling time requirements are satisfied. Any external
components connected (via high-impedance) to an analog input pin (capacitor, zener diode, etc.)
should have very little leakage current at the pin.
10 0000 0010 (= 514)
10 0000 0011 (= 515)
01 1111 1101 (= 509)
01 1111 1110 (= 510)
01 1111 1111 (= 511)
11 1111 1110 (= 1022)
11 1111 1111 (= 1023)
00 0000 0000 (= 0)
00 0000 0001 (= 1)
Output Code
10 0000 0000 (= 512)
(V
INH – VINL)
AVss
AVDD – AVss
1024
AVDD
AVss +
10 0000 0001 (= 513)
512 * (AVDD – AVss)
1024
AVss +
1023 * (AV
DD – AVss)
1024
AVss +
(A)
(B)
(C)
(D)
(E)

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