# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 18 © 2005-2011 Microchip Technology Inc.
All registers in the programmer’s model are memory mapped and can be manipulated directly by
the instruction set. A description of each register is provided in Table 2-1.
2.3 WORKING REGISTER ARRAY
The 16 working (W) registers can function as data, address or offset registers. The function of a
W register is determined by the instruction that accesses it.
Byte instructions, which target the working register array, only affect the Least Significant Byte
(LSB) of the target register. Since the working registers are memory mapped, the Least and Most
Significant Bytes can be manipulated through byte-wide data memory space accesses.
2.4 DEFAULT WORKING REGISTER (WREG)
The instruction set can be divided into two instruction types: working register instructions and file
register instructions. The working register instructions use the working register array as data
values or as addresses that point to a memory location. In contrast, file register instructions
operate on a specific memory address contained in the instruction opcode.
File register instructions that also utilize a working register do not specify the working register that
is to be used for the instruction. Instead, a default working register (WREG) is used for these file
register instructions. Working register, W0, is assigned to be the WREG. The WREG assignment
is not programmable.
2.5 SOFTWARE STACK FRAME POINTER
A frame is a user-defined section of memory in the stack, used by a function to allocate memory
for local variables. W14 has been assigned for use as a Stack Frame Pointer with the link (LNK)
and unlink (ULNK) instructions. However, if a Stack Frame Pointer and the LNK and ULNK
instructions are not used, W14 can be used by any instruction in the same manner as all other
W registers. On dsPIC33E and PIC24E devices, a Stack Frame Active (SFA) Status bit is used
to support nested stack frames. See
Section 4.7.2 “Software Stack Frame Pointer” for
detailed information about the Frame Pointer.
Note: Unless otherwise specified, the Programmer’s Model Register Descriptions in
Table 2-1 apply to all MCU and DSC device families.
Table 2-1: Programmer’s Model Register Descriptions
Register Description
CORCON CPU Core Configuration register
PC 23-bit Program Counter
PSVPAG
(1)
Program Space Visibility Page Address register
DSRPAG
(2)
Extended Data Space (EDS) Read Page register
DSWPAG
(2)
Extended Data Space (EDS) Write Page register
RCOUNT REPEAT Loop Count register
SPLIM Stack Pointer Limit Value register
SR ALU and DSP Engine STATUS register
TBLPAG Table Memory Page Address register
W0-W15 Working register array
ACCA, ACCB
(3)
40-bit DSP Accumulators
DCOUNT
(3)
DO Loop Count register
DOSTART
(3)
DO Loop Start Address register
DOEND
(3)
DO Loop End Address register
Note 1: This register is only available on PIC24F, PIC24H, dsPIC30F, and dsPIC33F
devices.
2: This register is only available on PIC24E and dsPIC33E devices.
3: This register is only available on dsPIC30F, dsPIC33F, and dsPIC33E devices.

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