# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Oscillator

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PIC24F Family Reference Manual
DS39700C-page 6-22 © 2009 Microchip Technology Inc.
6.7 SECONDARY OSCILLATOR (SOSC)
In most PIC24F devices, the low-power Secondary Oscillator (SOSC) is implemented to run with
a 32.768 kHz crystal. The oscillator is located on the SOSCO and SOSCI device pins and serves
as a secondary crystal clock source for low-power operation. It is used to drive Timer1, Real-Time
Clock and Calendar (RTCC) and other modules requiring a clock signal while in low-power
operation.
In some PIC24F devices, selectable Low-Current and High-Current Drive mode is available.
High-Current Drive mode results in a faster start-up time and is less susceptible to noise.
6.7.1 Enabling the Secondary Oscillator
The operation of SOSC is selected by the FNOSC Configuration bits and is further controlled by
the SOSCEN bit (OSCCON<1>). In most PIC24F devices, SOSCEN must be set to enable the
oscillator and use it for modules requiring the SOSC. In some PIC24F devices, applications do
not need to set SOSCEN to use modules requiring the SOSC. Enabling the modules will auto-
matically turn on the SOSC when the clock signal is needed. The SOSC, however, has a long
start-up time. To avoid delays for peripheral start-up, the SOSC can be manually started using
the SOSCEN bit. Refer to the specific PIC24F device data sheet for details.
6.7.2 Secondary Oscillator Operation
6.7.2.1 CONTINUOUS OPERATION
The SOSC is always enabled when SOSCEN is set. Leaving the oscillator running at all times
allows a fast switch to the 32 kHz system clock for lower power operation. Returning to the faster
main oscillator will still require an oscillator start-up time if it is a crystal type source (see Section
6.5.2.2 “Oscillator Start-up Timer”).
In addition, the oscillator will need to remain running at all times for Real-Time Clock application
using Timer1 or the RTCC module. Refer to Section 14. “Timers” (DS39704) and Section 29.
“Real-Time Clock and Calendar (RTCC)” (DS39696) in the “PIC24F Family Reference
Manual” for further details.
6.7.2.2 INTERMITTENT OPERATION
When SOSCEN is cleared, the oscillator will only operate when it is selected as the current
device clock source (COSC<2:0> = 100). It will be disabled automatically if it is the current device
clock source and the device enters Sleep mode.
6.7.2.3 OPERATING MODES
6.7.2.3.1 Low and High-Current Drive Modes
In some PIC24F devices, the SOSC can be run in Low or High-Current Drive mode. The selec-
tion is done through the Secondary Oscillator Mode Configuration bits, SOSCSEL<1:0>. Refer
to the specific device data sheet for details.
Using the lower Current Drive mode makes the SOSC more sensitive to noise and requires a
longer start-up time. When using this mode, care must be taken in the design and layout of the
SOSC circuit to ensure that the oscillator starts up and oscillates properly.
6.7.2.3.2 Digital Mode
In some PIC24F device, the SOSC can also be configured to operate in Digital mode. The selec-
tion is also done through the Secondary Oscillator Mode Configuration bits, SOSCSEL<1:0>.
Refer to the specific device data sheet for details.
When running in this mode, the SOSCI and SOSCO pins are configured as digital I/O pins. An
external 32 kHz clock source can be used to drive the SOSCI (SCLKI) pin giving clock signals to
modules configured to use the SOSC. The crystal driving circuit is disabled and the SOSCEN bit
(OSCCON<1>) has no effect.
Note: An unlock sequence is required before a write to OSCCON can occur. Refer to
Section 6.11.2 “Oscillator Switching Sequence” for more information.

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