# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Reset

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PIC24F Family Reference Manual
DS39712D-page 7-4 © 2011 Microchip Technology Inc.
bit 5 SWDTEN: Software WDT Enable/Disable bit
(4)
1 = WDT is enabled
0 = WDT is disabled
bit 4 WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
bit 3 SLEEP: Wake-up from Sleep Flag bit
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
bit 2 IDLE: Wake-up from Idle Flag bit
1 = Device has been in Idle mode
0 = Device has not been in Idle mode
bit 1 BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred; the BOR is also set after a Power-on Reset
0 = A Brown-out Reset has not occurred
bit 0 POR: Power-on Reset Flag bit
1 = A Power-on Reset has occurred
0 = A Power-on Reset has not occurred
Register 7-1: RCON: Reset Control Register
(1)
(Continued)
Note 1: All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
2: Implemented on select PIC24F devices only; otherwise, unimplemented and read as ‘0’.
3: This bit is named VREGS in some earlier PIC24F devices, with a different description of the bit’s
functionality. Regardless of the name or description, its function in power reduction is identical in all
devices.
4: If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting. In devices with FWDTEN<1:0>, SWDTEN is only enabled when FWDTEN is ‘01’.
Consult the specific device family data sheet for more information.

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