# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 17
Section 2. Programmer’s Model
Programmer’s
Model
2
Figure 2-4: dsPIC33E Programmer’s Model Diagram
RCOUNT
15 0
REPEAT Loop Counter
15 0
DO Loop Counter
DCOUNT
DOSTART
24 0
DO Loop Start Address
15
0
CPU Core Control Register
CORCON
DO Loop End Address
DOEND
24 0
0
0
0
0
015
Working Registers
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
W14/Frame Pointer
W15/Stack Pointer
SPLIM
Stack Pointer Limit Register
W0/WREG
DIV and MUL
Result Registers
Legend
Nested DO
39 031
DSP
Accumulators
ACCA
ACCB
15
MAC Operand
Registers
MAC Address
Registers
Status Register
Z
IPL2 IPL1
SRL
RA
N C
IPL0 OV
SRH
Stack
PUSH.S and
POP.S Shadow
Registers
TABPAG
22
0
7 0
Program Counter
Data Table Page Address
PSVPAG
9 0
X Data Space Read Page Address
TBLPAG
DSRPAG
0
PSVPAG
8 0
X Data Space Write Page Address
DSWPAG
OA OB SA
SB
OAB SAB DA DC

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