# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Motor Control PWM

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© 2010 Microchip Technology Inc. Preliminary DS39735A-page 47-21
Section 47. Motor Control PWM
Motor Control
PWM
47
47.7 PWM CLOCK CONTROL
The time base for the PWM pulses is provided by the 15-bit timer with prescale and postscale
options, as shown in Figure 47-2.
Figure 47-2: PWM Clock Control
47.7.1 Time Base Input Prescaler
The input clock (T CY) derived from the oscillator source can be prescaled to four possible options:
1:1, 1:4, 1:16 and 1:64. These options can be selected by using the PWM Time Base Input Clock
Prescale Select (PTCKPS) bits of the PWM Time Base Control (PxTCON<3:2>) register. The
prescaled clock is the input to the PWM clock control logic block.
47.7.2 Clock Control Logic and Time Base
This block determines the nature of the PWM timer output, depending on the time period
match, zero match and PWM Time Base Mode Select (PTMOD) bits in the PWM Time Base
Control (PxTCON<1:0>) register. The time base input prescaler counter is cleared when any of
the following occurs:
 A write to the PxTMR register
 A write to the PxTCON register
 A device Reset
The PWM Time Base (PxTMR) register is not cleared when PxTCON is written.
The time base value of the PWM Time Base Register Count Value (PTMR) bit in the PWM
Time Base (PxTMR<14:0>) register is compared with the contents of the PWM Time Base
Period (PxTPER) register. If a match occurs, a period match signal is generated.
If the time base value of the PTMR bits of the PxTMR register is zero, a zero-detect signal is
generated.
PWM
Period
Register
(PxTPER)
Clock
Control
Logic
Zero Match
Period Match
PWM
Timer
Register
(PxTMR)
PTEN
Timer
Direction
Control
PWM
Period
Buffer
Interrupt
Control
PWM
Interrupt Flag
(PWMxIF)
Gated Period Load
Period Load
UDIS (Update Disable)
IUE (Immediate
Update Enable)
PTDIR
T CY
PTMR
Clock
PTMOD<1:0>
0
Period Compare
Reset
Zero-Detect
PTMOD1
Period Match
Gated
Duty
Cycle
PTMOD<1:0>
1:1
1:4
1:16
1:64
Time Base
Input
Prescaler
1:1
1:16
Time Base
Output
Postscaler
Up/Down Count

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