# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 439
Section 5. Instruction Descriptions
Instruction
Descriptions
5
XOR
Exclusive OR Wb and Short Literal
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} XOR{.B} Wb, #lit5, Wd
[Wd]
[Wd++]
[Wd--]
[++Wd]
[--Wd]
Operands: Wb ∈ [W0 ... W15]
lit5 ∈ [0 ... 31]
Wd ∈ [W0 ... W15]
Operation: (Wb).XOR.lit5 → Wd
Status Affected: N, Z
Encoding: 0110 1www wBqq qddd d11k kkkk
Description: Compute the logical exclusive OR operation of the contents of the base
register Wb and the unsigned 5-bit literal operand and place the result in
the destination register Wd. Register direct addressing must be used for
Wb. Either register direct or indirect addressing may be used for Wd.
The ‘w’ bits select the address of the base register.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘q’ bits select the destination Address mode.
The ‘d’ bits select the destination register.
The ‘k’ bits provide the literal operand, a 5-bit integer number.
Note: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
Words: 1
Cycles: 1
Example 1:
XOR.B W4, #0x14, W5 ; XOR W4 and 0x14 (Byte mode)
; Store result to W5
Before
Instruction
After
Instruction
W4 C822 W4 C822
W5 1200 W5 1234
SR 0000 SR 0000
Example 2:
XOR W2, #0x1F, [W8++] ; XOR W2 by 0x1F (Word mode)
; Store result to [W8]
; Post-increment W8
Before
Instruction
After
Instruction
W2 8505 W2 8505
W8 1004 W8 1006
Data 1004 6628 Data 1004 851A
SR 0000 SR 0008 (N = 1)

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