# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- 10-Bit ADC

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PIC24F Family Reference Manual
DS39737A-page 49-54 Preliminary © 2010 Microchip Technology Inc.
49.18 DESIGN TIPS
Question 1: How can I optimize the system performance of the ADC module?
Answer: Here are three suggestions for optimizing performance:
1. Make sure you are meeting all of the timing specifications. If you are turning
the ADC module off and on, there is a minimum delay you must wait before
taking a sample. If you are changing input channels, there is a minimum
delay you must wait for this as well. Finally, there is T
AD, which is the time
selected for each bit conversion. T
AD is selected in ADxCON3 and should
be within a range, as specified in the “Electrical Characteristics” chapter
of the specific device data sheet. If T
AD is too short, the result may not be
fully converted before the conversion is terminated. If T
AD is too long, the
voltage on the sampling capacitor can decay before the conversion is
complete. These timing specifications are provided in the “Electrical
Characteristics” chapter of the specific device data sheet.
2. Often the source impedance of the analog signal is high (greater than
10 k), so the current drawn from the source to charge the sample capac-
itor can affect accuracy. If the input signal does not change too quickly, try
putting a 0.1 F capacitor on the analog input. This capacitor charges to the
analog voltage being sampled and supplies the instantaneous current
needed to charge the 4.4 pF internal holding capacitor.
3. Put the device into Sleep mode before the start of the A/D conversion. The
RC clock source selection is required for conversions in Sleep mode. This
technique increases accuracy because digital noise from the CPU and
other peripherals is minimized.
Question 2: Do you know of a good reference on ADCs?
Answer: A good reference for understanding A/D conversions is the “Analog-Digital
Conversion Handbook” third edition, published by Prentice Hall
(ISBN 0-13-03-2848-0).
Question 3: My combination of channels/sample and samples/interrupt is greater than
the size of the buffer. What will happen to the buffer?
Answer: This configuration is not recommended. The buffer will contain unknown results.

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