# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

- 1
- 2
…
- 183
- 184
- 185
- 186
- 187
…
- 501
- 502

© 2005-2011 Microchip Technology Inc. DS70157F-page 185
Section 5. Instruction Descriptions
Instruction
Descriptions
5
CLR
Clear Wd
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} CLR{.B} Wd
[Wd]
[Wd++]
[Wd--]
[++Wd]
[--Wd]
Operands: Wd ∈ [W0 ... W15]
Operation: 0 → Wd
Status Affected: None
Encoding: 1110 1011 0Bqq qddd d000 0000
Description: Clear the contents of register Wd. Either register direct or indirect
addressing may be used for Wd.
The ‘B’ bit select byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘q’ bits select the destination Address mode.
The ‘d’ bits select the destination register.
Note: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
Words: 1
Cycles: 1
Example 1:
CLR.B W2 ; Clear W2 (Byte mode)
Before
Instruction
After
Instruction
W2 3333 W2 3300
SR 0000 SR 0000
Example 2:
CLR [W0++] ; Clear [W0]
; Post-increment W0
Before
Instruction
After
Instruction
W0 2300 W0 2302
Data 2300 5607 Data 2300 0000
SR 0000 SR 0000

- 1
- 2
…
- 183
- 184
- 185
- 186
- 187
…
- 501
- 502