# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Motor Control PWM

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© 2010 Microchip Technology Inc. Preliminary DS39735A-page 47-3
Section 47. Motor Control PWM
Motor Control
PWM
47
47.3 REGISTER DESCRIPTIONS
The following registers are used to control the operation of the MCPWM module:
 PxTCON: PWM Time Base Control Register
This register is used for the selection of the Time Base mode, time base input clock prescaler
and time base output postscaler, and for enabling the time base timer.
 PxTMR: PWM Time Base Register
The time base count value and the time base count direction status are obtained in this
register.
 PxTPER: PWM Time Base Period Register
The PWM time base value is written into this register, which determines the PWM operating
frequency.
 PxSECMP: Special Event Compare Register
This register provides the compare value at which the analog-to-digital conversions are to
be synchronized with the PWM time base. Comparison can be either during up-count or
down-count in Center-Aligned mode depending on the setting of the SEVTDIR bit in this
register.
 PWMxCON: PWM Control Register 1
Selection of either Independent or Complementary mode for each PWM I/O pair is
performed in this register.
 PWMxCON2: PWM Control Register 2
This register provides the following selections:
- Selection of a PWM Special Event Trigger output postscaler value
- Immediate updating of duty cycle registers
- Selection of output override synchronization with the time base
- Enabling updates from duty cycle and period buffer registers
 PxDTCON1: Dead-Time Control Register 1
The dead-time value and clock period prescaler for Dead Time Unit A and Dead Time Unit B
can be selected using this register.
 PxDTCON2: Dead-Time Control Register 2
Dead-time insertions from Dead Time Unit A or Dead Time Unit B for each of the PWM
outputs can be selected using this register.
 PxFLTACON: Fault A Control Register(1)
This register provides the following selections:
- PWM output pin driven on an external Fault  active or inactive state
- Fault mode  Cycle-by-Cycle mode or Latched mode
- Pin pair to be controlled or not controlled by Fault Input A
 PxFLTBCON: Fault B Control Register(1)
This register provides the following selections:
- PWM output pin driven on an external Fault  active or inactive state
- Fault mode  Cycle-by-Cycle mode or Latched mode
- Pin pair to be controlled or not controlled by Fault Input B
 PxOVDCON: Override Control Register
This register is used for enabling the output override feature and for PWM output pin control
selection.
 PxDC1: PWM Duty Cycle Register 1
The 16-bit PWM duty cycle value for the PWM Output Pair 1 is written into this register.
 PxDC2: PWM Duty Cycle Register 2
The 16-bit PWM duty cycle value for the PWM Output Pair 2 is written into this register.

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