# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 34 © 2005-2011 Microchip Technology Inc.
bit 1 RND: Rounding Mode Select bit
1 = Biased (conventional) rounding enabled
0 = Unbiased (convergent) rounding enabled
bit 0 IF: Integer or Fractional Multiplier Mode Select bit
1 = Integer mode enabled for DSP multiply operations
0 = Fractional mode enabled for DSP multiply operations
Register 2-6: CORCON: Core Control Register (dsPIC30F and dsPIC33F Devices) (Continued)
Note 1: This bit will always read ‘0’.
2: DL<2:1> are read-only.
3: The first two levels of DO loop nesting are handled by hardware.
4: This bit may be read or cleared, but not set.
5: This bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU Interrupt Priority Level.

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