# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 186 © 2005-2011 Microchip Technology Inc.
CLR
Clear Accumulator, Prefetch Operands
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X
Syntax:
{label:}
CLR Acc {,[Wx],Wxd} {,[Wy],Wyd} {,AWB}
{,[Wx] + = kx,Wxd} {,[Wy] + = ky,Wyd}
{,[Wx] – = kx,Wxd} {,[Wy] – = ky,Wyd}
{,[W9 + W12],Wxd} {,[W11 + W12],Wyd}
Operands: Acc ∈ [A,B]
Wx ∈ [W8, W9]; kx ∈ [-6, -4, -2, 2, 4, 6]; Wxd ∈ [W4 ... W7]
Wy ∈ [W10, W11]; ky ∈ [-6, -4, -2, 2, 4, 6]; Wyd ∈ [W4 ... W7]
AWB ∈ [W13, [W13] + = 2]
Operation: 0 → Acc(A or B)
([Wx]) → Wxd; (Wx) +/– kx → Wx
([Wy]) → Wyd; (Wy) +/– ky → Wy
(Acc(B or A)) rounded → AWB
Status Affected: OA, OB, SA, SB
Encoding:
1100 0011 A0xx yyii iijj jjaa
Description: Clear all 40 bits of the specified accumulator, optionally prefetch
operands in preparation for a MAC type instruction and optionally store
the non-specified accumulator results. This instruction clears the
respective overflow and saturate flags (either OA, SA or OB, SB).
Operands Wx, Wxd, Wy and Wyd specify optional prefetch operations,
which support indirect and register offset addressing, as described in
Section 4.14.1 “MAC Prefetches”. Operand AWB specifies the optional
register direct or indirect store of the convergently rounded contents of
the “other” accumulator, as described in Section 4.14.4 “MAC Write
Back”.
The ‘A’ bit selects the other accumulator used for write back.
The ‘x’ bits select the prefetch Wxd destination.
The ‘y’ bits select the prefetch Wyd destination.
The ‘i’ bits select the Wx prefetch operation.
The ‘j’ bits select the Wy prefetch operation.
The ‘a’ bits select the accumulator Write Back destination.
Words: 1
Cycles: 1

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