# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

- 1
- 2
…
- 357
- 358
- 359
- 360
- 361
…
- 501
- 502

© 2005-2011 Microchip Technology Inc. DS70157F-page 359
Section 5. Instruction Descriptions
Instruction
Descriptions
5
REPEAT
Repeat Next Instruction Wn+1 Times
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X
Syntax: {label:} REPEAT Wn
Operands: Wn ∈ [W0 ... W15]
Operation: (Wn<13:0>) → RCOUNT
(PC) + 2 → PC
Enable Code Looping
Status Affected: RA
Encoding: 0000 1001 1000 0000 0000 ssss
Description: Repeat the instruction immediately following the REPEAT instruction
(Wn<13:0>) times. The instruction to be repeated (or target instruction)
is held in the instruction register for all iterations and is only fetched
once.
When this instruction executes, the RCOUNT register is loaded with the
lower 14 bits of Wn. RCOUNT is decremented with each execution of
the target instruction. When RCOUNT equals zero, the target instruction
is executed one more time, and then normal instruction execution
continues with the instruction following the target instruction.
The ‘s’ bits specify the Wn register that contains the repeat count.
Special Features, Restrictions:
1. When (Wn) = 0, REPEAT has the effect of a NOP and the RA bit is
not set.
2. The target REPEAT instruction cannot be:
• an instruction that changes program flow
• a DO, DISI, LNK, MOV.D, PWRSAV, REPEAT or ULNK
instruction
• a 2-word instruction
Unexpected results may occur if these target instructions are used.
Note: The REPEAT and target instruction are interruptible.
Words: 1
Cycles: 1
Example 1:
000A26 REPEAT W4 ; Execute COM (W4+1) times
000A28 COM [W0++], [W2++] ; Vector complement
Before
Instruction
After
Instruction
PC 00 0A26 PC 00 0A28
W4 0023 W4 0023
RCOUNT 0000 RCOUNT 0023
SR 0000 SR 0010 (RA = 1)

- 1
- 2
…
- 357
- 358
- 359
- 360
- 361
…
- 501
- 502