# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 407
Section 5. Instruction Descriptions
Instruction
Descriptions
5
SUB
Subtract Short Literal from Wb
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} SUB{.B} Wb, #lit5, Wd
[Wd]
[Wd++]
[Wd--]
[++Wd]
[--Wd]
Operands: Wb ∈ [W0 ... W15]
lit5 ∈ [0 ... 31]
Wd ∈ [W0 ... W15]
Operation: (Wb) – lit5 → Wd
Status Affected: DC, N, OV, Z, C
Encoding: 0101 0www wBqq qddd d11k kkkk
Description: Subtract the 5-bit unsigned literal operand from the contents of the base
register Wb, and place the result in the destination register Wd. Register
direct addressing must be used for Wb. Register direct or indirect
addressing must be used for Wd.
The ‘w’ bits select the address of the base register.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘q’ bits select the destination Address mode.
The ‘d’ bits select the destination register.
The ‘k’ bits provide the literal operand, a five-bit integer number.
Note: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
Words: 1
Cycles: 1
Example 1:
SUB.B W4, #0x10, W5 ; Sub. 0x10 from W4 (Byte mode)
; Store result to W5
Before
Instruction
After
Instruction
W4 1782 W4 1782
W5 7804 W5 7872
SR 0000 SR 0005 (OV, C = 1)
Example 2:
SUB W0, #0x8, [W2++] ; Sub. 0x8 from W0 (Word mode)
; Store result to [W2]
; Post-increment W2
Before
Instruction
After
Instruction
W0 F230 W0 F230
W2 2004 W2 2006
Data 2004 A557 Data 2004 F228
SR 0000 SR 0009 (N, C = 1)

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