# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 339
Section 5. Instruction Descriptions
Instruction
Descriptions
5
Example 2:
POP [++W10] ; Pre-increment W10
; Pop TOS to [W10]
Before
Instruction
After
Instruction
W10 0E02 W10 0E04
W15 1766 W15 1764
Data 0E04 E3E1 Data 0E04 C7B5
Data 1764 C7B5 Data 1764 C7B5
SR 0000 SR 0000
POP.D
Double Pop TOS to Wnd:Wnd+1
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} POP.D Wnd
Operands: Wnd ∈ [W0, W2, W4, ... W14]
Operation: (W15) – 2 → W15
(TOS) → Wnd + 1
(W15) – 2 → W15
(TOS) → Wnd
Status Affected: None
Encoding:
1011 1110 0000 0ddd 0100 1111
Description: A double word is POPped from the Top-of-Stack (TOS) and stored to
Wnd:Wnd + 1. The most significant word is stored to Wnd + 1, and the
least significant word is stored to Wnd. Since a double word is POPped,
the Stack Pointer (W15) gets decremented by 4.
The ‘d’ bits select the address of the destination register pair.
Note 1: This instruction operates on double words. See Figure 4-3 for
information on how double words are aligned in memory.
2: Wnd must be an even working register.
3: This instruction is a specific version of the “MOV.D Ws, Wnd”
instruction (MOV.D [--W15], Wnd). It reverse assembles as
MOV.D.
Words: 1
Cycles: 2
Example 1:
POP.D W6 ; Double pop TOS to W6
Before
Instruction
After
Instruction
W6 07BB W6 3210
W7 89AE W7 7654
W15 0850 W15 084C
Data 084C 3210 Data 084C 3210
Data 084E 7654 Data 084E 7654
SR 0000 SR 0000

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