# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- CPU

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PIC24F Family Reference Manual
DS39703A-page 2-20 Advance Information © 2006 Microchip Technology Inc.
2.10 PROGRAM FLOW LOOP CONTROL
The PIC24F supports REPEAT instruction construct to provide unconditional automatic program
loop control. The REPEAT instruction is used to implement a single instruction program loop. The
instruction uses control bits within the CPU STATUS register, SR, to temporarily modify CPU
operation.
2.10.1 REPEAT Loop
The REPEAT instruction causes the instruction that follows it to be repeated a number of times.
A literal value contained in the instruction, or a value in one of the W registers, can be used to
specify the REPEAT count value. The W register option enables the loop count to be a software
variable.
An instruction in a REPEAT loop will be executed at least once. The number of iterations for a
REPEAT loop will be the 14-bit literal value + 1, or Wn + 1.
The syntax for the two forms of the REPEAT instruction is given below:
Example 2-12: REPEAT Instruction Syntax
2.10.1.1 REPEAT OPERATION
The loop count for REPEAT operations is held in the 14-bit RCOUNT register which is memory
mapped. RCOUNT is initialized by the REPEAT instruction. The REPEAT instruction sets the
Repeat Active Status bit, RA (SR<4>), to ‘1’ if the RCOUNT is a non-zero value.
RA is a read-only bit and cannot be modified through software. For REPEAT loop count values
greater than ‘0’, the PC is not incremented. Further PC increments are inhibited until
RCOUNT = 0. See Example 2-13 for an instruction flow example of a REPEAT loop.
For a loop count value equal to ‘0’, REPEAT has the effect of a NOP and the RA (SR<4>) bit is not
set. The REPEAT loop is essentially disabled before it begins, allowing the target instruction to
execute only once while prefetching the subsequent instruction (i.e., normal execution flow).
Example 2-13: REPEAT Instruction Pipeline Flow
Note: The instruction immediately following the REPEAT instruction (i.e., the target
instruction) is always executed at least one time. It is always executed one time
more than the value specified in the 14-bit literal or the W register operand.
REPEAT #lit14 ; RCOUNT <-- lit14
(Valid target Instruction)
or
REPEAT Wn ; RCOUNT <-- Wn
(Valid target Instruction)
T CY0 T CY1 T CY2 T CY3 T CY4 T CY5
1.REPEAT #0x2
Fetch 1 Execute 1
2.MOV [W0++], [W1++]
Fetch 2 Execute 2
No Fetch Execute 2
No Fetch Execute 2
3.BSET PORTA, #3
Fetch 3 Execute 3
PC (at end of instruction) PC PC + 2 PC + 2 PC + 2 PC + 4 PC + 6
RCOUNT (at end of instruction) x 2 1 0 0 0
RA (at end of instruction) 0 1 1 0 0 0

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