# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 -- Serial Peripheral Interface

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dsPIC33/PIC24 Family Reference Manual
DS70005185A-page 32  2014 Microchip Technology Inc.
4.0 MASTER MODE CLOCK FREQUENCY
In Master mode, the clock provided to the SPIx module is the instruction cycle clock (T CY). This
clock is then prescaled by the primary prescaler, specified by the Primary Prescale (PPRE<1:0>)
bits (SPIxCON1<1:0>), and the secondary prescaler, specified by the Secondary Prescale
(SPRE<2:0>) bits (SPIxCON1<4:2>). The prescaled instruction clock becomes the serial clock
and is provided to external devices through the SCKx pin.
Equation 4-1 is used to calculate the SCKx clock frequency as a function of the primary and
secondary prescaler settings.
Equation 4-1: SPI Clock Frequency
Note: The SCKx signal clock is not free-running for normal SPI modes. It only runs for 8 or
16 pulses when the SPIxBUF is loaded with data; however, it is continuous for
Framed modes.
Note: Not all clock rates are supported. For more information, refer to the SPIx timing
specifications in the “Electrical Characteristics” chapter of the specific device
data sheet.
Primary Prescaler * Secondary Prescaler
F
CY
F
SCK
=

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