# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

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PIC24FJ64GA004 FAMILY
DS39881E-page 12  2010-2013 Microchip Technology Inc.
CN0 12 9 34 I ST Interrupt-on-Change Inputs.
CN1 11 8 33 I ST
CN2 2 27 19 I ST
CN3 3 28 20 I ST
CN4 4 1 21 I ST
CN5 5 2 22 I ST
CN6 6 3 23 I ST
CN7 7 4 24 I ST
CN8   25 I ST
CN9   26 I ST
CN10   27 I ST
CN11 26 23 15 I ST
CN12 25 22 14 I ST
CN13 24 21 11 I ST
CN14 23 20 10 I ST
CN15 22 19 9 I ST
CN16 21 18 8 I ST
CN17   3 I ST
CN18   2 I ST
CN19   5 I ST
CN20   4 I ST
CN21 18 15 1 I ST
CN22 17 14 44 I ST
CN23 16 13 43 I ST
CN24 15 12 42 I ST
CN25   37 I ST
CN26   38 I ST
CN27 14 11 41 I ST
CN28   36 I ST
CN29 10 7 31 I ST
CN30 9 6 30 I ST
CV
REF 25 22 14 O ANA Comparator Voltage Reference Output.
DISVREG 19 16 6 I ST Voltage Regulator Disable.
INT0 16 13 43 I ST External Interrupt Input.
MCLR
1 26 18 I ST Master Clear (device Reset) Input. This line is brought low
to cause a Reset.
TABLE 1-2: PIC24FJ64GA004 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
I/O
Input
Buffer
Description
28-Pin
SPDIP/
SSOP/SOIC
28-Pin
QFN
44-Pin
QFN/TQFP
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C = I
2
C/SMBus input buffer
Note 1: Alternative multiplexing when the I2C1SEL Configuration bit is cleared.

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