# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 408 © 2005-2011 Microchip Technology Inc.
SUB
Subtract Ws from Wb
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} SUB{.B} Wb, Ws, Wd
[Ws], [Wd]
[Ws++], [Wd++]
[Ws--], [Wd--]
[++Ws], [++Wd]
[--Ws], [--Wd]
Operands: Wb ∈ [W0 ... W15]
Ws ∈ [W0 ... W15]
Wd ∈ [W0 ... W15]
Operation: (Wb) – (Ws) → Wd
Status Affected: DC, N, OV, Z, C
Encoding: 0101 0www wBqq qddd dppp ssss
Description: Subtract the contents of the source register Ws from the contents of the
base register Wb and place the result in the destination register Wd.
Register direct addressing must be used for Wb. Either register direct or
indirect addressing may be used for Ws and Wd.
The ‘w’ bits select the address of the base register.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘q’ bits select the destination Address mode.
The ‘d’ bits select the destination register.
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the source register.
Note: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Example 1:
SUB.B W0, W1, W0 ; Sub. W1 from W0 (Byte mode)
; Store result to W0
Before
Instruction
After
Instruction
W0 1732 W0 17EE
W1 7844 W1 7844
SR 0000 SR 0108 (DC, N = 1)

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