# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- UART

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dsPIC33/PIC24 Family Reference Manual
DS70000582E-page 6  2009-2013 Microchip Technology Inc.
bit 5 ABAUD: Auto-Baud Enable bit
(5)
1 = Enables baud rate measurement on the next character, requires reception of a Sync field (0x55);
cleared in hardware upon completion
0 = Baud rate measurement is disabled or complete
bit 4 URXINV: UARTx Receive Polarity Inversion bit
1 = UxRX Idle state is 0
0 = UxRX Idle state is 1
bit 3 BRGH: High Baud Rate Select bit
1 = BRG generates 4 clocks per bit period (4x baud clock, High-Speed mode)
0 = BRG generates 16 clocks per bit period (16x baud clock, Standard Speed mode)
bit 2-1 PDSEL<1:0>: Parity and Data Selection bits
11 = 9-bit data, no parity
10 = 8-bit data, odd parity
01 = 8-bit data, even parity
00 = 8-bit data, no parity
bit 0 STSEL: Stop Selection bit
1 = 2 Stop bits
0 = 1 Stop bit
Register 2-1: UxMODE: UARTx Mode Register (Continued)
Note 1: This feature is only available for Standard Speed mode (BRGH = 0). Refer to the “Universal Asynchronous
Receiver Transmitter (UART)” chapter of the specific device data sheet for availability.
2: These features may not be available on all devices. Refer to the “Universal Asynchronous Receiver
Transmitter (UART)” chapter of the specific device data sheet for availability.
3: Enable this bit before enabling the UTXEN bit (UxSTA<10>).
4: The UARTx module does not recognize the first character received on a wake.
5: The use of this feature may consume the corresponding Input Capture x (ICx) peripheral. See Section 9.2
“Auto-Baud Support” for more information.

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