# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 -- Serial Peripheral Interface

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 2014 Microchip Technology Inc. DS70005185A-page 37
7.0 REGISTER MAP
A summary of the registers associated with the dsPIC33/PIC24 SPIx module is provided in Table 7-1.
Table 7-1: SPIx Register Map
SFR Name Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
SPIxSTAT SPIEN
— SPISIDL — — SPIBEC2 SPIBEC1 SPIBEC0 SRMPT SPIROV SRXMPT SISEL2 SISEL1 SISEL0
SPIxCON1
— — — DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE2 SPRE1 SPRE0
SPIxCON2 FRMEN SPIFSD FRMPOL/
SPIFPOL
— — — — — — — — — — — F
SPIxBUF SPIx Transmit and Receive Buffer Register
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal

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