# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

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 2010-2013 Microchip Technology Inc. DS39881E-page 171
PIC24FJ64GA004 FAMILY
REGISTER 18-3: PMADDR: PARALLEL PORT ADDRESS REGISTER
U-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
 CS1    ADDR10
(1)
ADDR9
(1)
ADDR8
(1)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADDR7
(1)
ADDR6
(1)
ADDR5
(1)
ADDR4
(1)
ADDR3
(1)
ADDR2
(1)
ADDR1
(1)
ADDR0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR 1 = Bit is set 0 = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as 0
bit 14 CS1: Chip Select 1 bit
1 = Chip Select 1 is active
0 = Chip Select 1 is inactive
bit 13-11 Unimplemented: Read as 0
bit 10-0 ADDR<10:0>: Parallel Port Destination Address bits
(1)
Note 1: PMA<10:2> bits are not available on 28-pin devices.
REGISTER 18-4: PMAEN: PARALLEL PORT ENABLE REGISTER
U-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
 PTEN14    PTEN10
(1)
PTEN9
(1)
PTEN8
(1)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTEN7
(1)
PTEN6
(1)
PTEN5
(1)
PTEN4
(1)
PTEN3
(1)
PTEN2
(1)
PTEN1 PTEN0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR 1 = Bit is set 0 = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as 0
bit 14 PTEN14: PMCS1 Strobe Enable bit
1 = PMCS1 pin functions as chip select
0 = PMCS1 pin functions as port I/O
bit 13-11 Unimplemented: Read as 0
bit 10-2 PTEN<10:2>: PMP Address Port Enable bits
(1)
1 = PMA<10:2> function as PMP address lines
0 = PMA<10:2> function as port I/O
bit 1-0 PTEN<1:0>: PMALH/PMALL Strobe Enable bits
1 = PMA1 and PMA0 function as either PMA<1:0> or PMALH and PMALL
0 = PMA1 and PMA0 pads functions as port I/O
Note 1: PMA<10:2> bits are not available on 28-pin devices.

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