# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- UART

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 2009-2013 Microchip Technology Inc. DS70000582E-page 35
UART
12.0 OPERATION OF UxCTS AND UxRTS CONTROL PINS
The UxCTS (Clear-to-Send) and UxRTS (Request-to-Send) pins are the two hardware controlled
pins associated with the UART module. These two pins allow the UART to operate in Flow Con-
trol and Simplex modes, which are explained in detail in Section 12.2 “UxRTS Function in Flow
Control Mode” and Section 12.3 “UxRTS Function in Simplex Mode”, respectively. They are
implemented to control transmission and reception between the UART and Data Terminal
Equipment (DTE).
12.1 UxCTS Function
During UART operation, the UxCTS pin acts as an input pin, which can control the transmission.
This pin is controlled by another device (typically a PC). The UxCTS
pin is configured using the
UEN<1:0> bits (UxMODE<9:8>).
 When UEN<1:0> = 10, UxCTS is configured as an input.
 If UxCTS
= 1, the transmitter will go as far as loading the data in the Transmit Shift Register,
but will not initiate a transmission. This will allow the DTE to control and receive data from the
controller per its requirements.
The UxCTS
pin is sampled while the transmit data changes (i.e., at the beginning of the 16 baud
clocks). The transmission begins only when the UxCTS
is sampled low. The UxCTS is sampled
internally with a T
P, which means that there should be a minimum pulse width of 1 TP on UxCTS.
However, this cannot be a specification as the T
P can vary depending on the clock used.
The user application can also read the status of the UxCTS
by reading the associated port pin.
12.2 UxRTS Function in Flow Control Mode
During Flow Control mode, the UxRTS pin of one DTE is connected to the UxCTS pin of the
dsPIC33 or PIC24 device, and the UxCTS
pin of the DTE is connected to the UxRTS pin of the
device, as illustrated in Figure 12-1. The UxRTS
signal indicates that the device is ready to
receive the data. The UxRTS
pin is driven as an output whenever UEN<1:0> = 01 or 10. The
UxRTS
pin is asserted (driven low) whenever the receiver is ready to receive data. When the
RTSMD bit = 0 (when the device is in Flow Control mode), the UxRTS
pin is driven low whenever
the receive buffer is not full or the OERR bit is not set. When the RTSMD bit = 0, the UxRTS
pin
is driven high whenever the device is not ready to receive (i.e., when the receiver buffer is either
full or in the process of shifting).
Since the UxRTS
pin of the DTE is connected to the UxCTS pin of the dsPIC33 and PIC24
devices, the UxRTS
pin drives the UxCTS pin low whenever it is ready to receive the data. Trans-
mission of the data begins when the UxCTS
pin goes low, as explained in Section 12.1 “UxCTS
Function”.
12.3 UxRTS Function in Simplex Mode
During Simplex mode, the UxRTS pin of the DCE is connected to the UxRTS pin of the dsPIC33
or PIC24 device, and the UxCTS
pin of the DCE is connected to the UxCTS pin of the device, as
illustrated in Figure 12-2. In Simplex mode, the UxRTS
signal indicates that the DTE is ready to
transmit. The DCE replies to the UxRTS
signal with the valid UxCTS whenever the DCE is ready
to receive the transmission. When the DTE receives a valid UxCTS
signal, it will begin
transmission.
As illustrated in Figure 12-3, Simplex mode is also used in IEEE-485 systems to enable trans-
mitters. When UxRTS
indicates that the DTE is ready to transmit, the UxRTS signal enables the
driver.
Note: The UxCTS and UxRTS pins are not available on all devices. Refer to the “Universal
Asynchronous Receiver Transmitter (UART)” chapter of the specific device data
sheet for availability.

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