# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Family Data Sheet

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DS39997C-page 42 Preliminary © 2011-2012 Microchip Technology Inc.
TABLE 4-10: 6-OUTPUT PWM1 REGISTER MAP
SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit
P1TCON 01C0 PTEN
— PTSIDL — — — — — PTOPS<3:0> PTCKPS<1:0> P
P1TMR 01C2 PTDIR PWM Timer Count Value Register
P1TPER 01C4 — PWM Time Base Period Register
P1SECMP 01C6 SEVTDIR PWM Special Event Compare Register
PWM1CON1
01C8 — — — — — PMOD3 PMOD2 PMOD1 — PEN3H PEN2H PEN1H — PEN3L PEN2
PWM1CON2
01CA — — — — SEVOPS<3:0> — — — — — IUE OSYN
P1DTCON1 01CC DTBPS<1:0> DTB<5:0> DTAPS<1:0> DTA<5:0>
P1DTCON2 01CE — — — — — — — — — — DTS3A DTS3I DTS2A DTS2I DTS
P1FLTACON 01D0 — — FAOV3H FAOV3L FAOV2H FAOV2L FAOV1H FAOV1L FLTAM — — — — FAEN3 FAEN
P1FLTBCON 01D2 — — FBOV3H FBOV3L FBOV2H FBOV2L FBOV1H FBOV1L FLTBM — — — — FBEN3 FBE
P1OVDCON 01D4 — — POVD3H POVD3L POVD2H POVD2L POVD1H POVD1L — — POUT3H POUT3L POUT2H POUT2L POUT1H
P1DC1 01D6 PWM Duty Cycle 1 Register
P1DC2 01D8 PWM Duty Cycle 2 Register
P1DC3 01DA PWM Duty Cycle 3 Register
PWM1KEY 01DE PWMLOCK<15:0>
Legend: u = uninitialized bit, — = unimplemented, read as ‘0’
TABLE 4-11: I2C1 REGISTER MAP
SFR Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3
I2C1RCV 0200 — — — — — — — — Receive Register
I2C1TRN 0202 — — — — — — — — Transmit Register
I2C1BRG 0204 — — — — — — — Baud Rate Generator Register
I2C1CON 0206 I2CEN — I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN
I2C1STAT 0208 ACKSTAT TRSTAT — — — BCL GCSTAT ADD10 IWCOL I2COV D_A P S
I2C1ADD 020A — — — — — — Address Register
I2C1MSK 020C — — — — — — Address Mask Register
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

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