# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Family Data Sheet

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© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 9
PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
Pin Diagrams (Continued)
44-Pin TQFP
= Pins are up to 5V tolerant
44 43 42 41 40 39 38 37 36 35 34
1 33
2 32
3 31
4 30
5 29
6 28
7 27
8 26
9 25
10 24
11 23
12 13 14 15 16 17 18 19 20 21 22
SCL1/RP8
(1)
/CN22/RB8RA10
RA7
PWM1H1/RTCC/RP14
(1)
/CN12/RB14
PWM1L1/RP15
(1)
/CN11/RB15
AV
SS
AVDD
MCLR
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1
PGED1/AN2/C2INA/C1INC/RP0
(1)
/CN4/RB0
PGEC1/AN3/CV
REFIN/CVREFOUT/C2INB/C1IND/RP1
(1)
/CN5/RB1
INT0/RP7
(1)
/CN23/RB7
FLTA1
(2)
/ASCL1/RP6
(1)
/CN24/RB6
FLTB1
(2)
/ASDA1/RP5
(1)
/CN27/RB5
V
DD
VSS
AN15/RP21
(1)
/CN26/RC5
AN12/RP20
(1)
/CN25/RC4
AN11/RP19
(1)
/CN28/RC3
RA9
PGEC3/SOSCO/AN10/T1CK/CN0/RA4
PIC24FJ32MC104
PWM1L2/RP13
(1)
/CN13/RB13
PWM1H2/RP12
(1)
/CN14/RB12
PWM1L3/RP11
(1)
/CN15/RB11
PWM1H3/RP10
(1)
/CN16/RB10
V
CAP
VSS
RP25
(1)
/CN19/RC9
RP24
(1)
/CN20/RC8
RP23
(1)
/CN17/RC7
SDA1/RP9
(1)
/CN21/RB9
RP22
(1)
/CN18/RC6
PEGED3/SOSCI/AN9/RP4
(1)
/CN1/RB4
RA8
OSC2/CLK0/CN29/RA3
OSC1/CLKI/CN30/RA2
V
SS
VDD
AN8/RP18
(1)
/CN10/RC2
AN7/RP17
(1)
/CN9/RC1
AN6/RP16
(1)
/CN8/RC0
AN5/C3IND/C2IND/RP3
(1)
/CN7/RB3
AN4/C3INC/C2INC/RP2
(1)
/CN6/RB2
Note 1: The RPn pins can be used by any remappable peripheral. See Table 1 for the list of available
peripherals.
2: The PWM Fault pins are enabled and asserted during any reset event. Refer to Section 15.2
“PWM Faults” for more information on the PWM faults.

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