# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 -- UART

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 2009-2013 Microchip Technology Inc. DS70000582E-page 51
16.0 REGISTERS MAP
A summary of the registers associated with the UART module of the dsPIC33 and PIC24 device families is p
Table 16-1: Registers Associated with UARTx
(1)
SFR Name Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
UxMODE UARTEN  USIDL IREN RTSMD ALTIO UEN1 UEN0 WAKE LPBACK ABAUD URXINV BRGH PDSEL1
UxSTA UTXISEL1 UTXINV UTXISEL0 URXEN UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR
UxADMD ADM_MASK7 ADM_MASK6 ADM_MASK5 ADM_MASK4 ADM_MASK3 ADM_MASK2 ADM_MASK1 ADM_MASK0 ADM_ADDR7 ADM_ADDR6 ADM_ADDR5 ADM_ADDR4 ADM_ADDR3 ADM_ADDR
UxTXREG LAST       UTX8 UARTx Transmit Register
UxRXREG        URX8 UARTx Receive Register
UxBRG Baud Rate Generator Prescaler Register
UxSCCON           TXRPT1
(2)
TXRPT0
(2)
CONV T0PD
(2)
UxSCINT   RXRPTIF
(2)
TXRPTIF
(2)
  WTCIF GTCIF  PARIE RXRPTIE TXRPTIE   W
UxGTC        GTC8 GTC7 GTC6 GTC5 GTC4 GTC3 GTC2
UxWTCL WTC15 WTC14 WTC13 WTC12 WTC11 WTC10 WTC9 WTC8 WTC7 WTC6 WTC5 WTC4 WTC3 WTC2
UxWTCH         WTC23 WTC22 WTC21 WTC20 WTC19 WTC18
Legend:
x
= unknown value on Reset,  = unimplemented, read as 
0
. Reset values are shown in hexadecimal.
Note 1:
The registers associated with UARTx are shown for reference. Refer to the
“Universal Asynchronous Receiver Transmitter (UART)”
chapter of the specific device data sheet for the registers associated with other UA
2:
These bits are applicable to T =
0
only. See the PTRCL bit (UxSCCON<1>).

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