# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- CPU

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© 2006 Microchip Technology Inc. Advance Information DS39703A-page 2-15
Section 2. CPU
CPU
2
2.6.2.1 SINGLE AND MIXED MODE INTEGERS
Simple data preprocessing logic either zero or sign-extends all operands to 17 bits, such that
unsigned, signed or mixed sign multiplications can be executed as signed values. All unsigned
operands are always zero-extended into the 17th bit of the multiplier input value. All signed
operands are always sign-extended into the 17th bit of the multiplier input value.
For unsigned 16-bit multiplies, the multiplier produces a 32-bit, unsigned result.
For signed 16-bit multiplies, the multiplier produces 30 bits of data and 2 bits of sign.
For 16-Bit Mixed mode (signed/unsigned) multiplies, the multiplier produces 31 bits of data and
1 bit of sign.
Figure 2-8: Multiplier Block Diagram
2
16
17 17
Mixed Mode
IR
16:31
0:15
16
16
16
Selection
Result
16 x 16
W Array
17 x 17-Bit
Multiplier

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