# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 19
Section 2. Programmer’s Model
Programmer’s
Model
2
2.6 SOFTWARE STACK POINTER
W15 serves as a dedicated Software Stack Pointer, and will be automatically modified by function
calls, exception processing and returns. However, W15 can be referenced by any instruction in
the same manner as all other W registers. This simplifies reading, writing and manipulating the
Stack Pointer. Refer to
Section 4.7.1 “Software Stack Pointer” for detailed information about
the Stack Pointer.
2.7 STACK POINTER LIMIT REGISTER (SPLIM)
The SPLIM is a 16-bit register associated with the Stack Pointer. It is used to prevent the Stack
Pointer from overflowing and accessing memory beyond the user allocated region of stack
memory. Refer to Section 4.7.3 “Stack Pointer Overflow” for detailed information about the
SPLIM.
2.8 ACCUMULATOR A AND ACCUMULATOR B (dsPIC30F, dsPIC33F AND
dsPIC33E DEVICES)
Accumulator A (ACCA) and Accumulator B (ACCB) are 40-bit wide registers, utilized by DSP
instructions to perform mathematical and shifting operations. Each accumulator is composed of
3 memory mapped registers:
• AccxU (bits 39-32)
• AccxH (bits 31-16)
• AccxL (bits 15-0)
In dsPIC33E devices, Accumulator A and Accumulator B can also be used as destination
registers in MCU MUL.xx instructions. This helps reduce the execution time of
extended-precision arithmetic operations.
Refer to Section 4.12 “Accumulator Usage (dsPIC30F, dsPIC33F and dsPIC33E Devices)”
for details on using ACCA and ACCB.
2.9 PROGRAM COUNTER
The Program Counter (PC) is 23 bits wide. Instructions are addressed in the 4M x 24-bit user
program memory space by PC<22:1>, where PC<0> is always set to ‘0’ to maintain instruction
word alignment and provide compatibility with data space addressing. This means that during
normal instruction execution, the PC increments by 2.
Program memory located at 0x800000 and above is utilized for device configuration data, Unit ID
and Device ID. This region is not available for user code execution and the PC can not access
this area. However, one may access this region of memory using table instructions. For details
on accessing the configuration data, Unit ID, and Device ID, refer to the specific device family
reference manual.
2.10 TBLPAG REGISTER
The TBLPAG register is used to hold the upper 8 bits of a program memory address during table
read and write operations. Table instructions are used to transfer data between program memory
space and data memory space. For details on accessing program memory with the table
instructions, refer to the family reference manual of the specific device.
2.11 PSVPAG REGISTER (PIC24F, PIC24H, dsPIC30F AND dsPIC33F)
Program space visibility allows the user to map a 32-Kbyte section of the program memory space
into the upper 32 Kbytes of data address space. This feature allows transparent access of
constant data through instructions that operate on data memory. The PSVPAG register selects
the 32-Kbyte region of program memory space that is mapped to the data address space. For
details on program space visibility, refer to the specific device family reference manual.

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