# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 129
Section 5. Instruction Descriptions
Instruction
Descriptions
5
BRA
Computed Branch
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X
Syntax: {label:} BRA Wn
Operands: Wn ∈ [W0 ... W15]
Operation: (PC + 2) + (2 * Wn) → PC
NOP → Instruction Register
Status Affected: None
Encoding: 0000 0001 0000 0110 0000 ssss
Description: The program branches unconditionally, relative to the next PC. The offset
of the branch is the sign-extended 17-bit value (2 * Wn), which supports
branches up to 32K instructions forward or backward. After this instruction
executes, the new PC will be (PC + 2) + 2 * Wn, since the PC will have
incremented to fetch the next instruction.
The ‘s’ bits select the source register.
Words: 1
Cycles: 4
Example 1:
002000 HERE: BRA W7
002002 . . .
... . . .
... . . .
002108 . . .
00210A TABLE7: . . .
00210C . . .
; Branch forward (2+2*W7)
Before
Instruction
After
Instruction
PC 00 2000 PC 00 210A
W7 0084 W7 0084
SR 0000 SR 0000

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