# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 273
Section 5. Instruction Descriptions
Instruction
Descriptions
5
LSR
Logical Shift Right by Short Literal
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} LSR Wb, #lit4, Wnd
Operands: Wb ∈ [W0 ... W15]
lit4 ∈ [0 ... 15]
Wnd ∈ [W0 ... W15]
Operation: lit4<3:0> → Shift_Val
0 → Wnd<15:15-Shift_Val + 1>
Wb<15:Shift_Val> → Wnd<15-Shift_Val:0>
Status Affected: N, Z
Encoding:
1101 1110 0www wddd d100 kkkk
Description: Logical shift right the contents of the source register Wb by the 4-bit
unsigned literal and store the result in the destination register Wnd. Direct
addressing must be used for Wb and Wnd.
The ‘w’ bits select the address of the base register.
The ‘d’ bits select the destination register.
The ‘k’ bits provide the literal operand.
Note: This instruction operates in Word mode only.
Words: 1
Cycles: 1
Example 1:
LSR W4, #14, W5 ; LSR W4 by 14
; Store result to W5
Before
Instruction
After
Instruction
W4 C800 W4 C800
W5 1200 W5 0003
SR 0000 SR 0000
Example 2:
LSR W4, #1, W5 ; LSR W4 by 1
; Store result to W5
Before
Instruction
After
Instruction
W4 0505 W4 0505
W5 F000 W5 0282
SR 0000 SR 0000

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