# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 289
Section 5. Instruction Descriptions
Instruction
Descriptions
5
MOV.D
Double Word Move from Source to Wnd
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} MOV.D Wns, Wnd
[Ws],
[Ws++],
[Ws--],
[++Ws],
[--Ws],
Operands: Wns ∈ [W0, W2, W4 ... W14]
Ws ∈ [W0 ... W15]
Wnd ∈ [W0, W2, W4 ... W14]
Operation: For direct addressing of source:
Wns → Wnd
Wns + 1 →Wnd + 1
For indirect addressing of source:
See Description
Status Affected: None
Encoding:
1011 1110 0000 0ddd 0ppp ssss
Description: Move the double word specified by the source to a destination working
register pair (Wnd:Wnd + 1). If register direct addressing is used for the
source, the contents of two successive working registers (Wns:Wns + 1)
are moved to Wnd:Wnd + 1. If indirect addressing is used for the source,
Ws specifies the effective address for the least significant word of the
double word. Any pre/post-increment or pre/post-decrement will adjust Ws
by 4 bytes to accommodate for the double word.
The ‘d’ bits select the destination register.
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the address of the first source register.
Note 1: This instruction only operates on double words. See Figure 4-3
for information on how double words are aligned in memory.
2: Wnd must be an even working register.
3: The instruction “POP.D Wnd” translates to MOV.D [--W15],
Wnd.
Words: 1
Cycles:
2
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.

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