# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 57
Section 4. Instruction Set Details
Instruction Set
Details
4
4.1.3.1 REGISTER INDIRECT ADDRESSING AND THE INSTRUCTION SET
The Addressing modes presented in Table 4-2 demonstrate the Indirect Addressing mode
capability of the 16-bit MCU and DSC devices. Due to operation encoding and functional
considerations, not every instruction which supports indirect addressing supports all modes
shown in
Table 4-2. The majority of instructions which use indirect addressing support the No
Modify, Pre-Increment, Pre-Decrement, Post-Increment and Post-Decrement Addressing
modes. The MOV instructions, and several accumulator-based DSP instructions (dsPIC30F,
dsPIC33F, and dsPIC33E devices only), are also capable of using the Register Offset
Addressing mode.
4.1.3.2 DSP MAC INDIRECT ADDRESSING MODES (dsPIC30F, dsPIC33F, AND
dsPIC33E DEVICES)
A special class of Indirect Addressing modes is utilized by the DSP MAC instructions. As is
described later in Section 4.14 “DSP MAC Instructions (dsPIC30F, dsPIC33F and dsPIC33E
Devices)”, the DSP MAC class of instructions are capable of performing two fetches from
memory using effective addressing. Since DSP algorithms frequently demand a broader range
of address updates, the Addressing modes offered by the DSP MAC instructions provide greater
range in the size of the effective address update which may be made.
Table 4-3 shows that both
X and Y prefetches support Post-Increment and Post-Decrement Addressing modes, with
updates of 2, 4 and 6 bytes. Since DSP instructions only execute in Word mode, no provisions
are made for odd sized EA updates.
Table 4-3: DSP MAC Indirect Addressing Modes
4.1.3.3 MODULO AND BIT-REVERSED ADDRESSING MODES (dsPIC30F,
dsPIC33F, AND dsPIC33E DEVICES)
The 16-bit DSC architecture provides support for two special Register Indirect Addressing
modes, which are commonly used to implement DSP algorithms. Modulo (or circular) addressing
provides an automated means to support circular data buffers in X and/or Y memory. Modulo
buffers remove the need for software to perform address boundary checks, which can improve
the performance of certain algorithms. Similarly, bit-reversed addressing allows one to access
the elements of a buffer in a nonlinear fashion. This Addressing mode simplifies data re-ordering
for radix-2 FFT algorithms and provides a significant reduction in FFT processing time.
Both of these Addressing modes are powerful features of the dsPIC30F, dsPIC33F, and
dsPIC33E architectures, which can be exploited by any instruction that uses indirect addressing.
Refer to the specific device family reference manual for details on using modulo and bit-reversed
addressing.
Note: Instructions which use register indirect addressing use the operand symbols Wd
and Ws in the summary tables of Section 3. “Instruction Set Overview”.
Addressing Mode X Memory Y Memory
Indirect with no modification EA = [Wx] EA = [Wy]
Indirect with Post-Increment by 2 EA = [Wx] + = 2 EA = [Wy] + = 2
Indirect with Post-Increment by 4 EA = [Wx] + = 4 EA = [Wy] + = 4
Indirect with Post-Increment by 6 EA = [Wx] + = 6 EA = [Wy] + = 6
Indirect with Post-Decrement by 2 EA = [Wx] – = 2 EA = [Wy] – = 2
Indirect with Post-Decrement by 4 EA = [Wx] – = 4 EA = [Wy] – = 4
Indirect with Post-Decrement by 6 EA = [Wx] – = 6 EA = [Wy] – = 6
Indirect with Register Offset EA = [W9 + W12] EA = [W11 + W12]
Note: As described in
Section 4.14 “DSP MAC Instructions (dsPIC30F, dsPIC33F and
dsPIC33E Devices)”, only W8 and W9 may be used to access X Memory, and only
W10 and W11 may be used to access Y Memory.

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