# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

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 2010-2013 Microchip Technology Inc. DS39881E-page 3
PIC24FJ64GA004 FAMILY
Pin Diagrams (Continued)
10
11
2
3
4
5
6
1
18
19
20
21
22
12
13
14
15
38
8
7
44
43
42
41
40
39
16
17
29
30
31
32
33
23
24
25
26
27
28
36
34
35
9
PIC24FJXXGA004
37
44-Pin QFN
(1)
SCL1/RP8/CN22/PMD4/RB8
RP7/INT0/CN23/PMD5/RB7
PGEC3/ASCL1/RP6/CN24/PMD6/RB6
PGED3/ASDA1/RP5/CN27/PMD7/RB5
V
DD
TDI/PMA9/RA9
SOSCO/T1CK/CN0/RA4
V
SS
RP21/CN26/PMA3/RC5
RP20/CN25/PMA4/RC4
RP19/CN28/PMBE/RC3
AN12/RP12/CN14/PMD0/RB12
PGEC2/RP11/CN15/PMD1/RB11
PGED2/RP10/CN16/PMD2/RB10
V
CAP/VDDCORE
DISVREG
RP25/CN19/PMA6/RC9
RP24/CN20/PMA5/RC8
RP23/CN17/PMA0/RC7
RP22/CN18/PMA1/RC6
SDA1/RP9/CN21/PMD3/RB9
AN11/RP13/CN13/PMRD/RB13
AN4/C1IN-/SDA2/RP2/CN6/RB2
AN5/C1IN+/SCL2/RP3/CN7/RB3
AN6/RP16/CN8/RC0
AN7/RP17/CN9/RC1
AN8/RP18/CN10/PMA2/RC2
SOSCI/RP4/CN1/RB4
V
DD
VSS
OSCI/CLKI/CN30/RA2
OSCO/CLKO/CN29/RA3
TDO/PMA8/RA8
PGEC1/AN3/C2IN+/RP1/CN5/RB1
PGED1/AN2/C2IN-/RP0/CN4/RB0
AN1/V
REF-/CN3/RA1
AN0/V
REF+/CN2/RA0
MCLR
TMS/PMA10/RA10
AV
DD
AV SS
AN9/RP15/CN11/PMCS1/RB15
AN10/CV
REF/RTCC/RP14/CN12/PMWR/RB14
TCK/PMA7/RA7
Legend: RPn represents remappable peripheral pins. Gray shading indicates 5.5V tolerant input pins.
Note 1: Back pad on QFN devices should be connected to Vss.

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