# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 389
Section 5. Instruction Descriptions
Instruction
Descriptions
5
SAC
Store Accumulator
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X
Syntax: {label:} SAC Acc, {#Slit4,} Wd
[Wd]
[Wd++]
[Wd--]
[--Wd]
[++Wd]
[Wd + Wb]
Operands: Acc ∈ [A,B]
Slit4 ∈ [-8 ... +7]
Wb, Wd ∈ [W0 ... W15]
Operation: Shift
Slit4
(Acc) (optional)
(Acc[31:16]) → Wd
Status Affected: None
Encoding: 1100 1100 Awww wrrr rhhh dddd
Description: Perform an optional, signed 4-bit shift of the specified accumulator, then
store the shifted contents of ACCxH (Acc[31:16]) to Wd. The shift range
is -8:7, where a negative operand indicates an arithmetic left shift and a
positive operand indicates an arithmetic right shift. Either register direct
or indirect addressing may be used for Wd.
The ‘A’ bit specifies the source accumulator.
The ‘w’ bits specify the offset register Wb.
The ‘r’ bits encode the optional accumulator pre-shift.
The ‘h’ bits select the destination Address mode.
The ‘d’ bits specify the destination register Wd.
Note 1: This instruction does not modify the contents of Acc.
2: This instruction stores the truncated contents of Acc. The
instruction SAC.R may be used to store the rounded
accumulator contents.
3: If Data Write saturation is enabled (SATDW, CORCON<5>,
= 1), the value stored to Wd is subject to saturation after the
optional shift is performed.
Words: 1
Cycles: 1
Example 1:
SAC A, #4, W5
; Right shift ACCA by 4
; Store result to W5
; CORCON = 0x0010 (SATDW = 1)
Before
Instruction
After
Instruction
W5 B900 W5 0120
ACCA 00 120F FF00 ACCA 00 120F FF00
CORCON 0010 CORCON 0010
SR 0000 SR 0000

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