# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Motor Control PWM

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© 2010 Microchip Technology Inc. Preliminary DS39735A-page 47-43
Section 47. Motor Control PWM
Motor Control
PWM
47
47.14.2 Special Event Trigger
The PWM module has a Special Event Trigger that allows analog-to-digital conversions to be
synchronized to the PWM time base. The analog-to-digital sampling and conversion time can
be programmed to occur at any point within the PWM period. The Special Event Trigger can
minimize the delay between the time the analog-to-digital conversion results are acquired and
the time the duty cycle value is updated.
The PWM Special Event Trigger has one SFR (PxSECMP) and four Postscaler Control bits
(SEVOPS<3:0>) to control its operation. The PxTMR value, for which a Special Event Trigger
should occur, is loaded into the Special Event Compare (PxSECMP) register.
When the PWM time base is in Up/Down Counting mode, an additional control bit is required to
specify the counting phase for the Special Event Trigger. The count phase is selected using the
Special Event Trigger Time Base Direction (SEVTDIR) bit in the MSb of the Special Event
Compare (PxSECMP<15>) register. If the SEVTDIR bit is cleared, the Special Event Trigger
will occur on the upward counting cycle of the PWM time base. If the SEVTDIR bit is set, the
Special Event Trigger will occur on the downward count cycle of the PWM time base. The
SEVTDIR control bit has no effect unless the PWM time base is configured for Up/Down
Counting mode.
The code in Example 47-8 demonstrates how to trigger an analog-to-digital conversion based
on MCPWM special event generation.
Example 47-8: Triggering ADC Based on MCPWM Special Event Generation
47.14.2.1 SPECIAL EVENT TRIGGER ENABLE
The PWM module always produces the Special Event Trigger signal. This signal may optionally
be used by the A/D Converter module. Refer to Section 17. 10-Bit A/D Converter in the
PIC24F Family Reference Manual for more information on using the Special Event Trigger.
47.14.2.2 SPECIAL EVENT TRIGGER POSTSCALER
The PWM Special Event Trigger has a postscaler that allows a 1:1 to 1:16 postscale ratio. The
postscaler is useful when synchronized A/D conversions do not need to be performed during
every PWM cycle. The postscaler is configured by writing the PWM Special Event Trigger Output
Postscale Select (SEVOPS) control bits in the PWM Control Register 2 (PWMxCON2<11:8>)
SFR.
The special event output postscaler is cleared on the following events:
 Any write to the Special Event Compare (PxSECMP) register
 Any device Reset
/* Select Special Event time base direction such that trigger will occur */
/* when PWM time base is counting downwards */
P1SECMPbits.SEVTDIR = 1;
/* Select PWM Special Event Trigger Output Postscale value to 1:1 */
PWM1CON2bits.SEVOPS = 0b0000;
/* Assign special event compare value */
P1SECMPbits.SEVTCMP = 100;
/* Choose ADC1 trigger source such that MCPWM module stops sampling and */
/* starts conversion */
AD1CON1bits.SSRC = 0b011;

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