# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Reset

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© 2011 Microchip Technology Inc. DS39712D-page 7-5
Section 7. Reset
Reset
7
Register 7-2: RCON2: Reset and System Control Register
(1)
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
U-0 U-0 U-0 r-0
R/CO-1 R/CO-1 R/CO-1 R/CO-0
— — — r VDDBOR
(2)
VDDPOR
(2,3)
VBPOR
(2,4)
VBAT
(2)
bit 7 bit 0
Legend: CO = Clearable-Once bit r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-5 Unimplemented: Read as ‘0’
bit 4 Reserved: Maintain as ‘0’
bit 3 VDDBOR: V
DD Brown-out Reset Flag bit
(2)
1 = A VDD Brown-out Reset has occurred (set by hardware)
0 = A V
DD Brown-out Reset has not occurred
bit 2 VDDPOR: VDD Power-on Reset Flag bit
(2,3)
1 = A VDD Power-up Reset has occurred (set by hardware)
0 = A V
DD Power-up Reset has not occurred
bit 1 VBPOR: V BPOR Flag bit
(2,4)
1 = A VBAT POR occurred (no battery is connected to the VBAT pin or the battery is below the threshold
voltage of the DSGPRx register)
0 = A VBAT POR has not occurred
bit 0 VBAT: VBAT Flag bit
(2)
1 = A POR exit has occurred with the VBAT pin powered (battery connected to the VBAT pin)
0 = A POR exit from V
BAT has not occurred
Note 1: This register is not implemented in all devices. Consult the device family’s data sheet for more information.
2: This bit is set in hardware only. It can only be cleared in software.
3: Indicates V
DD POR; the POR bit in the RCON register (RCON<0>) indicates the V DDCORE POR.
4: This bit is set when the device is originally powered up, even if power is present on V
BAT.

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