# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 43
Section 3. Instruction Set Overview
Instruction Set
Overview
3
Table 3-4: Logic Instructions
Assembly Syntax Description Words Cycles
Page
Number
AND f {,WREG}
(1)
Destination = f .AND. WREG 1 1
(2)
112
AND #lit10,Wn Wn = lit10 .AND. Wn 1 1 113
AND Wb,#lit5,Wd Wd = Wb .AND. lit5 1 1 114
AND Wb,Ws,Wd Wd = Wb .AND. Ws 1 1
(2)
115
CLR f f = 0x0000 1 1 184
CLR WREG WREG = 0x0000 1 1 184
CLR Wd Wd = 0x0000 1 1 185
COM f {,WREG}
(1)
Destination = f 1 1
(2)
189
COM Ws,Wd Wd = Ws 1 1
(2)
190
IOR f {,WREG}
(1)
Destination = f .IOR. WREG 1 1
(2)
260
IOR #lit10,Wn Wn = lit10 .IOR. Wn 1 1 261
IOR Wb,#lit5,Wd Wd = Wb .IOR. lit5 1 1 262
IOR Wb,Ws,Wd Wd = Wb .IOR. Ws 1 1
(2)
263
NEG f {,WREG}
(1)
Destination = f + 1 1 1
(2)
333
NEG Ws,Wd Wd = Ws + 1 1 1
(2)
333
SETM f f = 0xFFFF 1 1 395
SETM WREG WREG = 0xFFFF 1 1 395
SETM Wd Wd = 0xFFFF 1 1 396
XOR f {,WREG}
(1)
Destination = f .XOR. WREG 1 1
(2)
437
XOR #lit10,Wn Wn = lit10 .XOR. Wn 1 1 438
XOR Wb,#lit5,Wd Wd = Wb .XOR. lit5 1 1 439
XOR Wb,Ws,Wd Wd = Wb .XOR. Ws 1 1
(2)
440
Note 1: When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When
{,WREG} is not specified, the destination of the instruction is the file register f.
2: In dsPIC33E and PIC24E devices, read and read-modify-write operations on non-CPU Special Function
Registers require an additional cycle when compared to dsPIC30F, dsPIC33F, PIC24F and PIC24H
devices.

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