# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- I2C

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 2007-2014 Microchip Technology Inc. DS70000195F-page 29
Inter-Integrated Circuit™ (I
2
C™)
5.7 Building Complete Master Messages
As described in Section 5.0 “Communicating as a Master in a Single Master Environment”,
the user software is responsible for constructing messages with the correct message protocol.
The module controls individual portions of the I
2
C message protocol; however, sequencing of the
components of the protocol to construct a complete message is performed by the user software.
The user software can use polling or interrupt methods while using the module. The timing
diagrams shown in this document use interrupts for detecting various events.
The user software can use the SEN, RSEN, PEN, RCEN and ACKEN bits (Least Significant 5 bits
of the I2CxCON or I2CxCONL register) and the TRSTAT status bit as a ‘state’ flag when progressing
through a message. For example, Table 5-1 shows some example state numbers associated with
bus states.
Table 5-1: Master Message Protocol States
The user software will begin a message by issuing a Start condition. The user software will record
the state number corresponding to the Start.
As each event completes and generates an interrupt, the interrupt handler may check the state
number. Therefore, for a Start state, the interrupt handler will confirm execution of the Start
sequence and then start a master transmission event to send the I
2
C device address, changing
the state number to correspond to the master transmission.
On the next interrupt, the interrupt handler will again check the state, determining that a master
transmission just completed. The interrupt handler will confirm successful transmission of the
data, then move on to the next event, depending on the contents of the message. In this manner,
on each interrupt, the interrupt handler will progress through the message protocol until the
complete message is sent.
Figure 5-9 provides a detailed examination of the same message sequence as shown in
Figure 5-1. Figure 5-10 provides a few simple examples of the messages using a 7-bit address-
ing format. Figure 5-11 provides an example of a 10-bit addressing format message sending data
to a slave. Figure 5-12 provides an example of a 10-bit addressing format message receiving
data from a slave.
Example
State Number
(1)
I2CxCON<4:0> or
I2CxCONL<4:0>
TRSTAT
(I2CxSTAT<14>)
State
0 00000 0 Bus Idle or Wait
1 00001 N/A Sending Start Event
2 00000 1 Master Transmitting
3 00010 N/A Sending Repeated Start Event
4 00100 N/A Sending Stop Event
5 01000 N/A Master Reception
6 10000 N/A Master Acknowledgment
Note 1: The example state numbers are for reference only. The user software can assign
the state numbers as desired.

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