# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

- 1
- 2
…
- 100
- 101
- 102
- 103
- 104
…
- 277
- 278

PIC24FJ64GA004 FAMILY
DS39881E-page 102  2010-2013 Microchip Technology Inc.
8.4.3 SECONDARY OSCILLATOR
LOW-POWER OPERATION
The Secondary Oscillator (SOSC) can operate in two
distinct levels of power consumption based on device
configuration. In Low-Power mode, the oscillator
operates in a low gain, low-power state. By default, the
oscillator uses a higher gain setting, and therefore,
requires more power. The Secondary Oscillator Mode
Selection bits, SOSCSEL<1:0> (CW2<12:11>),
determine the oscillators power mode.
When Low-Power mode is used, care must be taken in
the design and layout of the SOSC circuit to ensure that
the oscillator will start up and oscillate properly. The
lower gain of this mode makes the SOSC more
sensitive to noise and requires a longer start-up time.
8.4.4 OSCILLATOR LAYOUT
On low pin count devices, such as those in the
PIC24FJ64GA004 family, due to pinout limitations, the
SOSC is more susceptible to noise than other PIC24F
devices. Unless proper care is taken in the design and
layout of the SOSC circuit, it is possible for
inaccuracies to be introduced into the oscillators
period.
In general, the crystal circuit connections should be as
short as possible. It is also good practice to surround
the crystal circuit with a ground loop or ground plane.
For more detailed information on crystal circuit design,
please refer to the PIC24F Family Reference Manual”,
“Oscillator” (DS39700) and Microchip Application
Notes: AN826, Crystal Oscillator Basics and Crystal
Selection for rfPIC
®
and PICmicro
®
Devices”
(DS00826) and AN849, “Basic PICmicro
®
Oscillator
Design” (DS00849).
Note: This feature is implemented only on
PIC24FJ64GA004 family devices with a
major silicon revision level of B or later
(DEVREV register value is 3042h or
greater).

- 1
- 2
…
- 100
- 101
- 102
- 103
- 104
…
- 277
- 278