# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 293
Section 5. Instruction Descriptions
Instruction
Descriptions
5
MOVSAC
Prefetch Operands and Store Accumulator
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X
Syntax: {label:} MOVSAC Acc {,[Wx], Wxd} {,[Wy], Wyd} {,AWB}
{,[Wx] + = kx, Wxd} {,[Wy] + = ky, Wyd}
{,[Wx] – = kx, Wxd} {,[Wy] – = ky, Wyd}
{,[W9 + W12], Wxd} {,[W11 + W12], Wyd}
Operands: Acc ∈ [A,B]
Wx ∈ [W8, W9]; kx ∈ [-6, -4, -2, 2, 4, 6]; Wxd ∈ [W4 ... W7]
Wy ∈ [W10, W11]; ky ∈ [-6, -4, -2, 2, 4, 6]; Wyd ∈ [W4 ... W7]
AWB ∈ [W13, [W13] + = 2]
Operation: ([Wx]) → Wxd; (Wx) + kx → Wx
([Wy]) → Wyd; (Wy) + ky →Wy
(Acc(B or A)) rounded → AWB
Status Affected: None
Encoding:
1100 0111 A0xx yyii iijj jjaa
Description: Optionally prefetch operands in preparation for another MAC type
instruction and optionally store the unspecified accumulator results. Even
though an accumulator operation is not performed in this instruction, an
accumulator must be specified to designate which accumulator to write
back.
Operands Wx, Wxd, Wy and Wyd specify optional prefetch operations
which support indirect and register offset addressing, as described in
Section 4.14.1 “MAC Prefetches”. Operand AWB specifies the optional
store of the “other” accumulator, as described in
Section 4.14.4 “MAC Write Back”.
The ‘A’ bit selects the other accumulator used for write back.
The ‘x’ bits select the prefetch Wxd destination.
The ‘y’ bits select the prefetch Wyd destination.
The ‘i’ bits select the Wx prefetch operation.
The ‘j’ bits select the Wy prefetch operation.
The ‘a’ bits select the accumulator Write Back destination.
Words: 1
Cycles: 1

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