# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 366 © 2005-2011 Microchip Technology Inc.
RETFIE
Return from Interrupt
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X
Syntax: {label:} RETFIE
Operands: None
Operation: (W15) - 2 → W15
(TOS<15:8>) → (SR<7:0>)
(TOS<7>) → (IPL3, CORCON<3>)
(TOS<6:0>) → (PC<22:16>)
(W15) - 2 → W15
(TOS<15:1>) → (PC<15:1>)
TOS<0> → SFA bit
NOP → Instruction Register
Status Affected: IPL<3:0>, RA, N, OV, Z, C, SFA
Encoding: 0000 0110 0100 0000 0000 0000
Description: Return from Interrupt Service Routine. The stack is POPped, which
loads the low byte of the STATUS register, IPL<3> (CORCON<3>) and
the Most Significant Byte of the PC. The stack is POPped again, which
loads the lower 16 bits of the PC.
Note 1: Restoring IPL<3> and the low byte of the STATUS register
restores the Interrupt Priority Level to the level before the
execution was processed.
2: Before RETFIE is executed, the appropriate interrupt flag
must be cleared in software to avoid recursive interrupts.
Words: 1
Cycles: 6 (5 if exception pending)
Example 1:
000A26 RETFIE ; Return from ISR
Before
Instruction
After
Instruction
PC 00 0A26 PC 01 0230
W15 0834 W15 0830
Data 0830 0230 Data 0830 0230
Data 0832 8101 Data 0832 8101
CORCON 0001 CORCON 0001
SR 0000 SR 0081 (IPL = 4, C = 1)
Example 2:
008050 RETFIE ; Return from ISR
Before
Instruction
After
Instruction
PC 00 8050 PC 00 7008
W15 0926 W15 0922
Data 0922 7008 Data 0922 7008
Data 0924 0300 Data 0924 0300
CORCON 0000 CORCON 0000
SR 0000 SR 0003 (Z, C = 1)

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