# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 233
Section 5. Instruction Descriptions
Instruction
Descriptions
5
DO
Initialize Hardware Loop Literal
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X
Syntax: {label:} DO #lit15, Expr
Operands: lit15 ∈ [0 ... 32767]
Expr may be an absolute address, label or expression.
Expr is resolved by the linker to a Slit16, where Slit16 ∈ [-32768 ... +32767].
Operation: PUSH DO shadows (DCOUNT, DOEND, DOSTART)
(lit15) → DCOUNT
(PC) + 4 → PC
(PC) → DOSTART
(PC) + (2 * Slit16) → DOEND
Increment DL<2:0> (CORCON<10:8>)
Status Affected: DA
Encoding: 0000 1000 0kkk kkkk kkkk kkkk
0000 0000 nnnn nnnn nnnn nnnn
Description: Initiate a no overhead hardware DO loop, which is executed (lit15 + 1) times.
The DO loop begins at the address following the DO instruction, and ends at
the address 2 * Slit16 instruction words away. The 15-bit count value (lit15)
supports a maximum loop count value of 32768, and the 16-bit offset value
(Slit16) supports offsets of 32K instruction words in both directions.
When this instruction executes, DCOUNT, DOSTART and DOEND are first
PUSHed into their respective shadow registers, and then updated with the
new DO loop parameters specified by the instruction. The DO level count,
DL<2:0> bits (CORCON<8:10>), is then incremented. After the DO loop
completes execution, the PUSHed DCOUNT, DOSTART and DOEND
registers are restored, and DL<2:0> is decremented.
The ‘k’ bits specify the loop count.
The ‘n’ bits are a signed literal that specifies the number of instructions that
are offset from the PC to the last instruction executed in the loop.
Special Features, Restrictions:
The following features and restrictions apply to the DO instruction.
1. Using a loop count of ‘0’ will result in the loop being executed one time.
2. Using a loop size of -2, -1 or 0 is invalid. Unexpected results may
occur if these offsets are used.
3. The very last two instructions of the DO loop cannot be:
• an instruction which changes program control flow
• a DO or REPEAT instruction
Unexpected results may occur if any of these instructions are used.
4. If a hard trap occurs in the second to last instruction or third to last
instruction of a DO loop, the loop will not function properly. The hard
trap includes exceptions of priority level 13 through level 15, inclusive.
5. The first instruction of the DO loop cannot be a PSV read or Table read.
Note 1: The DO instruction is interruptible and supports 1 level of
hardware nesting. Nesting up to an additional 5 levels may be
provided in software by the user. See the specific device family
reference manual for details.
2: The linker will convert the specified expression into the offset to
be used.

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