# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA0XX -- Flash Programming Specification

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PIC24FJXXXGA0XX
DS39768D-page 48 © 2008 Microchip Technology Inc.
PIC24FJ128GAGA006
Disabled CFGB + SUM(0:0157FB) 0xF8CC 0xF6CE
Enabled 0 0x0000 0x0000
PIC24FJ128GAGA008
Disabled CFGB + SUM(0:0157FB) 0xF8CC 0xF6CE
Enabled 0 0x0000 0x0000
PIC24FJ128GAGA010
Disabled CFGB + SUM(0:0157FB) 0xF8CC 0xF6CE
Enabled 0 0x0000 0x0000
TABLE 6-4: CHECKSUM COMPUTATION (CONTINUED)
Device
Read Code
Protection
Checksum Computation
Erased
Checksum
Value
Checksum with
0xAAAAAA at 0x0 and Last
Code Address
Legend: Item
Description
SUM[a:b] = Byte sum of locations, a to b inclusive (all 3 bytes of code memory)
CFGB = Configuration Block (masked),
64/80/100-Pin Devices = Byte sum of (CW1 & 0x7DDF + CW2 & 0x87E3)
28/44-Pin Devices = Byte sum of (CW1 & 0x7FDF + CW2 & 0xFFF7)
Note: CW1 address is last location of implemented program memory; CW2 is (last location – 2).

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