# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Oscillator

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© 2009 Microchip Technology Inc. DS39700C-page 6-3
Section 6. Oscillator
Oscillator
6
6.2 CPU CLOCKING SCHEME
The system clock source can be provided by one of four sources:
• Primary Oscillator (POSC) on the OSC1 and OSC2 pins
• Secondary Oscillator (SOSC) on the SOSCI and SOSCO pins
• Internal Fast RC Oscillator (FRC)
• Internal Low-Power RC Oscillator (LPRC)
The Primary Oscillator and FRC sources have the option of using the internal 4x PLL. The
frequency of the FRC clock source can optionally be reduced by the programmable clock divider.
The selected clock source generates the processor and peripheral clock sources.
The processor clock source is divided by two to produce the internal instruction cycle clock, F
CY.
In this document, the instruction cycle clock is also denoted by F
OSC/2. The timing diagram in
Figure 6-2 shows the relationship between the processor clock source and instruction execution.
The internal instruction cycle clock, FOSC/2, can be provided on the OSC2 I/O pin for some
operating modes of the Primary Oscillator.
Figure 6-2: Clock or Instruction Cycle Timing
FOSC
PC
F
CY
PC PC + 2 PC + 4
Fetch INST (PC)
Execute INST (PC – 2) Fetch INST (PC + 2)
Execute INST (PC) Fetch INST (PC + 4)
Execute INST (PC + 2)
T CY

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