# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Family Data Sheet

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© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 337
PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
Revision C (June 2012)
This revision includes updates in support of the
following new devices:
• PIC24FJ32MC101
• PIC24FJ32MC102
• PIC24FJ32MC104
Also, where applicable, new sections were added to
peripheral chapters that provide information and links
to the related resources, as well as helpful tips. For
examples, see Section 18.1 “UART Helpful Tips”
and Section 18.2 “UART Resources”.
This revision includes text and formatting changes that
were incorporated throughout the document.
All other major changes are referenced by their
respective section in Table A-2.
TABLE A-2: MAJOR SECTION UPDATES
Section Name Update Description
16-bit Microcontrollers
(up to 32 KB Flash and 2
KB SRAM)
The content on the first page of this section was extensively reworked to provide the
reader with the key features and functionality of this device family in an “at-a-glance”
format.
TABLE 2: “PIC24FJ32MC101/102/104 Controller Families” was added, which provides
a feature overview of the new devices.
All pin diagrams were updated (see “Pin Diagrams”).
Section 1.0 “Device
Overview”
Updated the notes in the device family block diagram (see Figure 1-1).
Updated the following pinout I/O descriptions (Table 1-1):
• ANx
• CNx
• RAx
• RCx
Relocated 1.1 “Referenced Sources” to the previous chapter (see “Referenced
Sources”).
Section 2.0 “Guidelines
for Getting Started with
16-bit Microcontrollers”
Updated the Recommended Minimum Connection diagram (see Figure 2-1).
Section 4.0 “Memory
Organization”
Updated the existing Program Memory Map (see Figure 4-1) and added the Program
Memory Map for PIC24FJ16MC101/102 Devices (see Figure 4-2).
Updated the existing Data Memory Map (see Figure 4-4) and added the Data Memory
Map for PIC24FJ32MC101/102/104 Devices with 2 KB RAM (see Figure 4-5).
The following Special Function Register maps were updated or added:
• TABLE 4-4: Change Notification Register Map for PIC24FJ32MC104 Devices
• TABLE 4-5: Interrupt Controller Register Map
• TABLE 4-8: Input Capture Register Map
• TABLE 4-14: ADC1 Register Map for PIC24FJXXMC101 Devices
• TABLE 4-16: ADC1 Register Map for PIC24FJ32104 Devices
• TABLE 4-21: Peripheral Pin Select Input Register Map
• TABLE 4-24: Peripheral Pin Select Output Register Map for PIC24FJ32MC104
Devices
• TABLE 4-25: PORTA Register Map for PIC24FJXXMC101/102
• TABLE 4-26: PORTA Register Map for PIC24FJ32MC104 Devices
• TABLE 4-30: PORTC Register Map for PIC24FJ32MC104 Devices
• TABLE 4-33: PMD Register Map

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