# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- UART

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dsPIC33/PIC24 Family Reference Manual
DS70000582E-page 34  2009-2013 Microchip Technology Inc.
The wake-up event causes a receive interrupt by setting the UxRXIF bit. The UARTx Receive
Interrupt Select mode bits (URXISEL<1:0>) are ignored for this function. If the UxRXIF interrupt
is enabled, then this will wake up the device.
Figure 11-1: Auto-Wake-up Bit (WAKE) Timings During Normal Operation
Figure 11-2: Auto-Wake-up Bit (WAKE) Timings During Sleep
Note 1: The Sync Break (or Wake-up Signal) character must be of sufficient length to allow
enough time for the selected oscillator to start and provide proper initialization to
the UART. To ensure that the UART wakes up in time, the user application should
read the value of the WAKE bit (UxMODE<7>). If it is clear, it is possible that the
UART was not ready in time to receive the next character and the module might
need to be resynchronized to the bus.
2: In Sleep mode, a Start bit, when detected, causes the device to wake up only if the
WAKE bit (UxMODE<7>) is set just before the device enters Sleep mode.
3: In Sleep and Idle modes, as the falling edge on the UART receive pin generates a
UART receive interrupt, a dummy byte is copied if the UART receive buffer is read
in the first UART receive interrupt.
OSC1
WAKE bit
(1)
UxRX
UxRXIF
Note 1: UARTx state machine is held in Idle while WAKE bit is active.
Bit Set by User
Auto-Cleared
OSC1
WAKE bit
(2)
UxRX
UxRXIF
Sleep
Note 1: If the wake-up event requires a long oscillator warm-up time, the auto-clear of the WAKE bit can occur while the system
clocks are still active. This sequence should not depend on the presence of F
P.
2: The UARTx state machine is held in Idle while the WAKE bit is active.
(Note 1)
Bit Set by
Auto-Cleared
User Software

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