# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Family Data Sheet

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PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
DS39997C-page 264 Preliminary © 2011-2012 Microchip Technology Inc.
TABLE 26-10: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS
DC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ T A ≤ +85°C for Industrial
-40°C ≤ T
A ≤ +125°C for Extended
Param
No.
Symbol Characteristic Min Typ
(1)
Max Units Conditions
VIL Input Low Voltage
DI10 I/O pins V
SS — 0.2 VDD V
DI15 MCLR
VSS
—
0.2 V
DD V
DI18 I/O Pins with SDAx, SCLx VSS — 0.3 VDD V SMBus disabled
DI19 I/O Pins with SDAx, SCLx V
SS — 0.8 V SMBus enabled
V
IH Input High Voltage
DI20 I/O Pins Not 5V Tolerant
(4)
I/O Pins 5V Tolerant
(4)
0.7 VDD
0.7 VDD
—
—
VDD
5.5
V
V
—
DI28 SDAx, SCLx 0.7 V
DD — 5.5 V SMBus disabled
DI29 SDAx, SCLx 2.1 — 5.5 V SMBus enabled
I
CNPU CNx Pull-up Current
DI30 50 250 400 μA V
DD = 3.3V, VPIN = VSS
IIL Input Leakage Current
(2,3)
DI50 I/O pins 5V Tolerant
(4)
— — ±2 μA V SS ≤ VPIN ≤ VDD,
Pin at high-impedance
DI51 I/O Pins Not 5V Tolerant
(4)
— — ±1 μA V SS ≤ VPIN ≤ VDD,
Pin at high-impedance,
-40°C ≤ T
A ≤ +85°C
DI51a I/O Pins Not 5V Tolerant
(4)
— — ±2 μA Shared with external reference
pins,
-40°C ≤ T
A ≤ +85°C
DI51b I/O Pins Not 5V Tolerant
(4)
— — ±3.5 μA VSS ≤ VPIN ≤ VDD, Pin at high-
impedance,
-40°C ≤ T
A ≤ +125°C
DI51c I/O Pins Not 5V Tolerant
(4)
— — ±8 μA Analog pins shared with exter-
nal reference pins,
-40°C ≤ T
A ≤ +125°C
DI55 MCLR
—
—
±2 μA VSS ≤ VPIN ≤ VDD
DI56 OSC1 — — ±2 μA VSS ≤ VPIN ≤ VDD,
XT and HS modes
Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
2: The leakage current on the MCLR
pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
3: Negative current is defined as current sourced by the pin.
4: See “Pin Diagrams” for a list of 5V tolerant pins.
5: V
IL source < (VSS – 0.3). Characterized but not tested.
6: Non-5V tolerant pins V
IH source > (VDD + 0.3), 5V tolerant pins VIH source > 5.5V. Characterized but not
tested.
7: Digital 5V tolerant pins cannot tolerate any “positive” input injection current from input sources > 5.5V.
8: Injection currents > | 0 | can affect the ADC results by approximately 4-6 counts.
9: Any number and/or combination of I/O pins not excluded under I
ICL or IICH conditions are permitted pro-
vided the mathematical “absolute instantaneous” sum of the input injection currents from all pins do not
exceed the specified limit. Characterized but not tested.

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