# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

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PIC24FJ64GA004 FAMILY
DS39881E-page 172  2010-2013 Microchip Technology Inc.
REGISTER 18-5: PMSTAT: PARALLEL PORT STATUS REGISTER
R-0 R/W-0, HS U-0 U-0 R-0 R-0 R-0 R-0
IBF IBOV
  IB3F IB2F IB1F IB0F
bit 15 bit 8
R-1 R/W-0, HS U-0 U-0 R-1 R-1 R-1 R-1
OBE OBUF
  OB3E OB2E OB1E OB0E
bit 7 bit 0
Legend: HS = Hardware Settable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR 1 = Bit is set 0 = Bit is cleared x = Bit is unknown
bit 15 IBF: Input Buffer Full Status bit
1 = All writable Input Buffer registers are full
0 = Some or all of the writable Input Buffer registers are empty
bit 14 IBOV: Input Buffer Overflow Status bit
1 = A write attempt to a full Input Byte register occurred (must be cleared in software)
0 = No overflow occurred
bit 13-12 Unimplemented: Read as 0
bit 11-8 IB3F:IB0F: Input Buffer x Status Full bits
1 = Input Buffer x contains data that has not been read (reading buffer will clear this bit)
0 = Input Buffer x does not contain any unread data
bit 7 OBE: Output Buffer Empty Status bit
1 = All readable Output Buffer registers are empty
0 = Some or all of the readable Output Buffer registers are full
bit 6 OBUF: Output Buffer Underflow Status bit
1 = A read occurred from an empty Output Byte register (must be cleared in software)
0 = No underflow occurred
bit 5-4 Unimplemented: Read as 0
bit 3-0 OB3E:OB0E Output Buffer x Status Empty bits
1 = Output Buffer x is empty (writing data to the buffer will clear this bit)
0 = Output Buffer x contains data that has not been transmitted

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