# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

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PIC24FJ64GA004 FAMILY
DS39881E-page 246  2010-2013 Microchip Technology Inc.
TABLE 27-16: PLL CLOCK TIMING SPECIFICATIONS (V DD = 2.0V TO 3.6V)
AC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)
Operating temperature -40°C  T A  +85°C for Industrial
-40°C  T
A  +125°C for Extended
Param
No.
Sym Characteristic
(1)
Min Typ
(2)
Max Units Conditions
OS50 F
PLLI PLL Input Frequency
Range
3
3


8
6
MHz
MHz
ECPLL, HSPLL, XTPLL modes,
-40°C  T
A  +85°C
ECPLL, HSPLL, XTPLL modes,
-40°C  T A  +125°C
OS51 F SYS PLL Output Frequency
Range
8
8


32
24
MHz
MHz
-40°C  T A  +85°C
-40°C  T
A  +125°C
OS52 T
LOCK PLL Start-up Time
(Lock Time)
  2 ms
OS53 D
CLK CLKO Stability (Jitter) -2 1 2 % Measured over 100 ms period
Note 1: These parameters are characterized but not tested in manufacturing.
2: Data in Typ column is at 3.3V, +25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
TABLE 27-17: INTERNAL RC OSCILLATOR SPECIFICATIONS
AC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)
Operating temperature -40°C  T A +85°C for Industrial
-40°C  T
A  +125°C for Extended
Param
No.
Sym Characteristic Min Typ Max Units Conditions
T
FRC FRC Start-up Time  15  s
T
LPRC LPRC Start-up Time  40  s
TABLE 27-18: AC CHARACTERISTICS: INTERNAL RC ACCURACY
AC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)
Operating temperature -40°C  T A  +85°C for Industrial
-40°C  T
A  +125°C for Extended
Param
No.
Characteristic Min Typ Max Units Conditions
F20 Internal FRC @ 8 MHz
(1)
-2  2 % +25°C
3.0V  V
DD  3.6V-5  5 % -40°C  T A +85°C
-7  7 % +125°C
F21 LPRC @ 31 kHz
(2)
-15  15 % +25°C
3.0V  V
DD  3.6V-15  15 % -40°C  T A +85°C
-30  30 % +125°C
Note 1: Frequency calibrated at +25°C and 3.3V. OSCTUN bits can be used to compensate for temperature drift.
2: Change of LPRC frequency as V
DD changes.

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