# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Charge Time Measurement Unit

- 1
- 2
…
- 23
- 24
- 25
- 26
- 27
…
- 33
- 34

© 2010 Microchip Technology Inc. DS39724B-page 11-25
Section 11. CTMU
CTMU
11
11.8 CREATING A DELAY WITH THE CTMU MODULE
A unique feature on board the CTMU module is its ability to generate system clock independent
output pulses based on an external capacitor value. This is accomplished using the internal
comparator voltage reference module, Comparator 2 input pin and an external capacitor. The
pulse is output onto the CTPLS pin. To enable this mode, set the TGEN bit.
An example circuit is shown in Figure 11-3. C
PULSE is chosen by the user to determine the output
pulse width on CTPLS. The pulse width is calculated by T = (C
PULSE/I)*V, where I is known from
the current source measurement step (Section 11.5.1 Current Source Calibration) and V is
the internal reference voltage (CV
REF).
An example use of this feature is for interfacing with variable capacitive-based sensors, such as
a humidity sensor. As the humidity varies, the pulse-width output on CTPLS will vary. The CTPLS
output pin can be connected to an input capture pin and the varying pulse width is measured to
determine the humidity in the application.
Follow these steps to use this feature:
1. Initialize Comparator 2.
2. Initialize the comparator voltage reference.
3. Initialize the CTMU and enable time delay generation by setting the TGEN bit.
4. Set EDG1STAT.
5. When C
PULSE charges to the value of the voltage reference trip point, an output pulse is
generated on CTPLS.
Figure 11-3: Typical Connections and Internal Configuration for Pulse Delay Generation
C2
CVREF
CTPLS
PIC24F Device
Current Source
Comparator
CTMU
CTEDG1
C2INx
(1)
CDELAY
EDG1
Note 1: Please refer to the specific device data sheet for information related to the comparator input used in this mode.

- 1
- 2
…
- 23
- 24
- 25
- 26
- 27
…
- 33
- 34