# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Program Memory

- 1
- 2
…
- 5
- 6
- 7
- 8
- 9
…
- 19
- 20

© 2007 Microchip Technology Inc. Advance Information DS39715A-page 4-7
Section 4. Program Memory
Program
Memory
4
4.4 PROGRAM SPACE VISIBILITY FROM DATA SPACE
The upper 32 Kbytes of the PIC24F data memory address space may optionally be mapped into
any 16K word program space page. This mode of operation is called Program Space Visibility
(PSV) and provides transparent access of stored constant data from data space without the need
to use special instructions (i.e., TBLRD, TBLWT).
4.4.1 PSV Configuration
Program Space Visibility is enabled by setting the PSV bit (CORCON<2>). A description of the
CORCON register can be found in Section 2. “CPU”.
When PSV is enabled, each data space address in the upper half of the data memory map (data
memory with higher addresses) will map directly into a program address (see Figure 4-8). The
PSV window allows access to the lower 16 bits of the 24-bit program word. The upper 8 bits of
the program memory data should be programmed to force an illegal instruction, or a NOP, to main-
tain machine robustness. Note that table instructions provide the only method of reading the
upper 8 bits of each program memory word.
Figure 4-9 shows how the PSV address is generated. The 15 LSbs of the PSV address are
provided by the W register that contains the effective address. The MSb of the W register is not
used to form the address. Instead, the MSb specifies whether to perform a PSV access from
program space or a normal access from data memory space. If a W register effective address of
0x8000 or greater is used, the data access will occur from program memory space when PSV is
enabled. All accesses will occur from data memory when the W register effective address is less
than 0x8000.
The remaining address bits are provided by the PSVPAG register (PSVPAG<7:0>), as shown in
Figure 4-9. The PSVPAG bits are concatenated with the 15 LSbs of the W register, holding the
effective address to form a 23-bit program memory address. PSV can only be used to access
values in program memory space. Table instructions must be used to access values in the user
configuration space.
The LSb of the W register value is used as a byte select bit, which allows instructions using PSV
to operate in Byte or Word mode.

- 1
- 2
…
- 5
- 6
- 7
- 8
- 9
…
- 19
- 20