# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA0XX -- Flash Programming Specification

- 1
- 2
…
- 34
- 35
- 36
- 37
- 38
…
- 51
- 52

PIC24FJXXXGA0XX
DS39768D-page 36 © 2008 Microchip Technology Inc.
TABLE 5-1: PROGRAMMING EXECUTIVE COMMAND SET
5.2.4 COMMAND DESCRIPTIONS
All commands supported by the programming executive
are described in Section 5.2.5 “SCHECK Command”
through Section 5.2.12 “QVER Command”.
5.2.5 SCHECK COMMAND
The SCHECK command instructs the programming
executive to do nothing but generate a response. This
command is used as a “Sanity Check” to verify that the
programming executive is operational.
Expected Response (2 words):
1000h
0002h
Opcode Mnemonic
Length
(16-bit words)
Time-out Description
0h SCHECK 1 1 ms Sanity check.
1h READC 3 1 ms Read an 8-bit word from the specified Device ID register.
2h READP 4 1 ms/row Read N 24-bit instruction words of code memory starting from
the specified address.
3h RESERVED N/A N/A This command is reserved. It will return a NACK.
4h PROGC 4 5 ms Write an 8-bit word to the specified Device ID registers.
5h PROGP 99 5 ms Program one row of code memory at the specified address,
then verify.
(1)
7h RESERVED N/A N/A This command is reserved. It will return a NACK.
8h RESERVED N/A N/A This command is reserved. It will return a NACK.
9h RESERVED N/A N/A This command is reserved. It will return a NACK.
Ah QBLANK 3 TBD Query if the code memory is blank.
Bh QVER 1 1 ms Query the programming executive software version.
Dh PROGW 4 5 ms Program one instruction word of code memory at the specified
address, then verify.
Legend: TBD = To Be Determined
Note 1: One row of code memory consists of (64) 24-bit words. Refer to Table 2-3 for device-specific information.
15 12 11 0
Opcode Length
Field Description
Opcode 0h
Length 1h
Note: This instruction is not required for
programming but is provided for
development purposes only.

- 1
- 2
…
- 34
- 35
- 36
- 37
- 38
…
- 51
- 52