# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- CPU

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© 2006 Microchip Technology Inc. Advance Information DS39703A-page 2-13
Section 2. CPU
CPU
2
2.4.2 Other PIC24F CPU Control Registers
The registers listed below are associated with the PIC24F CPU core, but are described in further
detail in other sections of this manual.
2.4.2.1 TBLPAG: TABLE PAGE ADDRESS POINTER
The TBLPAG register is used to hold the upper 8 bits of a program memory address during table
read and write operations. Table instructions are used to transfer data between program memory
space and data memory space. Refer to Section 4. “Program Memory” for further details
(check Microchip web site for availability: www.microchip.com).
2.4.2.2 PSVPAG: PROGRAM MEMORY VISIBILITY PAGE ADDRESS POINTER
Program Space Visibility allows the user to map a 32-Kbyte section of the program memory
space into the upper 32 Kbytes of data address space. This feature allows transparent access of
constant data through PIC24F instructions that operate on data memory. The PSVPAG register
selects the 32-Kbyte region of program memory space that is mapped to the data address space.
Refer to Section 4. “Program Memory” for more information on the PSVPAG register (check
Microchip web site for availability: www.microchip.com).
2.4.2.3 DISICNT: DISABLE INTERRUPTS COUNTER REGISTER
The DISICNT register is used by the DISI instruction to disable interrupts of priority 1-6 for a
specified number of cycles. See Section 8. “Interrupts” for further information.
2.5 ARITHMETIC LOGIC UNIT (ALU)
The PIC24F ALU is 16 bits wide and is capable of addition, subtraction, single bit shifts and logic
operations. Unless otherwise mentioned, arithmetic operations are 2’s complement in nature.
Depending on the operation, the ALU may affect the values of the Carry/Borrow (C), Zero (Z),
Negative (N), Overflow (OV) and Half Carry/Borrow
(DC) Status bits in the SR register. The C
and DC Status bits operate as Borrow
and Digit Borrow bits, respectively, for subtraction
operations.
The ALU can perform 8-bit or 16-bit operations depending on the mode of the instruction that is
used. Data for the ALU operation can come from the W register array, or data memory, depend-
ing on the addressing mode of the instruction. Likewise, output data from the ALU can be written
to the W register array or a data memory location.
Refer to the
“dsPIC30F Programmer’s Reference Manual”
(DS70030) for information on the SR
bits affected by each instruction, addressing modes and 8-Bit/16-Bit Instruction modes.
Note 1: Byte operations use the 16-bit ALU and can produce results in excess of 8 bits.
However, to maintain backward compatibility with PICmicro devices, the ALU result
from all byte operations is written back as a byte (i.e., MSB not modified) and the
CPU STATUS register, SR, is updated based only upon the state of the LSB of the
result.
2: All register instructions performed in Byte mode only affect the LSB of the W registers.
The MSB of any W register can be modified by using file register instructions that
access the memory mapped contents of the W registers.

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