# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 197
Section 5. Instruction Descriptions
Instruction
Descriptions
5
CP0
Compare Ws with 0x0, Set Status Flags
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} CP0{.B} Ws
[Ws]
[Ws++]
[Ws--]
[++Ws]
[--Ws]
Operands: Ws ∈ [W0 ... W15]
Operation: (Ws) – 0x0000
Status Affected: DC, N, OV, Z, C
Encoding: 1110 0000 0000 0B00 0ppp ssss
Description: Compute (Ws) – 0x0000 and update the STATUS register. The result of
the subtraction is not stored. Register direct or indirect addressing may be
used for Ws.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the address of the Ws source register.
Note: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Example 1:
CP0.B [W4--] ; Compare [W4] with 0 (Byte mode)
; Post-decrement W4
Before
Instruction
After
Instruction
W4 1001 W4 1000
Data 1000 0034 Data 1000 0034
SR 0000 SR 0001 (C = 1)
Example 2:
CP0 [--W5] ; Compare [--W5] with 0 (Word mode)
Before
Instruction
After
Instruction
W5 2400 W5 23FE
Data 23FE 9000 Data 23FE 9000
SR 0000 SR 0009 (N, C = 1)

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