# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA0XX -- Flash Programming Specification

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© 2008 Microchip Technology Inc. DS39768D-page 5
PIC24FJXXXGA0XX
Pin Diagrams (Continued)
10
11
2
3
4
5
6
1
18
19
20
21
22
12
13
14
15
38
8
7
44
43
42
41
40
39
16
17
29
30
31
32
33
23
24
25
26
27
28
36
34
35
9
PIC24FJXXGA004
37
44-Pin QFN
(1)
RB8
RB7
PGC3/EMUC3/RP6/SCL1/CN24/PMD6/RB6
PGD3/EMUD3/RP5/SDA1/CN27/PMD7/RB5
V
DD
RA9
RA4
V
SS
RC5
RC4
RC3
RB12
PGC2/EMUC2/RP11/CN15/PMD1/RB11
PGD2/EMUD2/RP10/CN16/PMD2/RB10
V
CAP/VDDCORE
DISVREG
RC9
RC8
RC7
RC6
RB9
RB13
RB2
RB3
RC0
RC1
RC2
RB4
V
DD
VSS
RA2
RA3
RA8
PGC1/EMUC1/AN3/C2IN+/RP1/CN5/RB1
PGD1/EMUD1/AN2/C2IN-/RP0/CN4/RB0
RA1
RA0
MCLR
RA10
AV
DD
AVSS
RB15
RB14
RA7
Legend: RPx represents remappable peripheral pins.
Note 1: The bottom pad of QFN packages should be connected to V
SS.

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