# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 346 © 2005-2011 Microchip Technology Inc.
PWRSAV
Enter Power Saving Mode
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} PWRSAV #lit1
Operands: lit1 ∈ [0,1]
Operation: 0 → WDT count register
0 → WDT prescaler A count
0 → WDT prescaler B count
0 → WDTO (RCON<4>)
0 → SLEEP (RCON<3>)
0 → IDLE (RCON<2>)
If (lit1 =
0):
Enter Sleep mode
Else:
Enter Idle mode
Status Affected: None
Encoding: 1111 1110 0100 0000 0000 000k
Description: Place the processor into the specified Power Saving mode. If lit1 = ‘0’,
Sleep mode is entered. In Sleep mode, the clock to the CPU and
peripherals are shutdown. If an on-chip oscillator is being used, it is also
shutdown. If lit1 = ‘1’, Idle mode is entered. In Idle mode, the clock to the
CPU shuts down, but the clock source remains active and the
peripherals continue to operate.
This instruction resets the Watchdog Timer Count register and the
Prescaler Count registers. In addition, the WDTO, Sleep and Idle flags of
the Reset System and Control register (RCON) are reset.
Note 1: The processor will exit from Idle or Sleep through an interrupt,
processor Reset or Watchdog Time-out. See the specific
device data sheet for details.
2: If awakened from Idle mode, Idle bit (RCON<2>) is set to ‘1’
and the clock source is applied to the CPU.
3: If awakened from Sleep mode, Sleep bit (RCON<3>) is set to
‘1’ and the clock source is started.
4: If awakened from a Watchdog Time-out, WDTO bit
(RCON<4>) is set to ‘1’.
Words: 1
Cycles: 1
Example 1:
PWRSAV #0 ; Enter SLEEP mode
Before
Instruction
After
Instruction
SR 0040 (IPL = 2) SR 0040 (IPL = 2)
Example 2:
PWRSAV #1 ; Enter IDLE mode
Before
Instruction
After
Instruction
SR 0020 (IPL = 1) SR 0020 (IPL = 1)

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