# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 36 © 2005-2011 Microchip Technology Inc.
bit 2 SFA: Stack Frame Active Status bit
1 = Stack frame is active. W14 and W15 address 0x0000 to 0xFFFF, regardless of DSRPAG and
DSWPAG values.
0 = Stack frame is not active. W14 and W15 address of EDS or Base Data Space
bit 1 RND: Rounding Mode Select bit
1 = Biased (conventional) rounding enabled
0 = Unbiased (convergent) rounding enabled
bit 0 IF: Integer or Fractional Multiplier Mode Select bit
1 = Integer mode enabled for DSP multiply
0 = Fractional mode enabled for DSP multiply
Register 2-7: CORCON: Core Control Register (dsPIC33E Devices) (Continued)
Note 1: This bit always reads as ‘0’.
2: This bit may be read or cleared, but not set.
3: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.

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