# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 248 © 2005-2011 Microchip Technology Inc.
FF1R
Find First One from Right
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} FF1R Ws, Wnd
[Ws],
[Ws++],
[Ws--],
[++Ws],
[--Ws],
Operands: Ws ∈ [W0 ... W15]
Wnd ∈ [W0 ... W15]
Operation: Max_Shift = 17
Temp = (Ws)
Shift = 1
While ( (Shift < Max_Shift) && !(Temp & 0x1) )
Temp = Temp >> 1
Shift = Shift + 1
If (Shift == Max_Shift)
0 → (Wnd)
Else
Shift → (Wnd)
Status Affected: C
Encoding:
1100 1111 0000 0ddd dppp ssss
Description: Finds the first occurrence of a ‘1’ starting from the Least Significant bit of
Ws and working towards the Most Significant bit of the word operand. The
bit number result is zero-extended to 16 bits and placed in Wnd.
Bit numbering begins with the Least Significant bit (allocated number 1)
and advances to the Most Significant bit (allocated number 16). A result of
zero indicates a ‘1’ was not found, and the C flag will be set. If a ‘1’ is
found, the C flag is cleared.
The ‘d’ bits select the destination register.
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the source register.
Note: This instruction operates in Word mode only.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.

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