# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

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 2010-2013 Microchip Technology Inc. DS39881E-page 15
PIC24FJ64GA004 FAMILY
RP0 4 1 21 I/O ST Remappable Peripheral.
RP1 5 2 22 I/O ST
RP2 6 3 23 I/O ST
RP3 7 4 24 I/O ST
RP4 11 8 33 I/O ST
RP5 14 11 41 I/O ST
RP6 15 12 42 I/O ST
RP7 16 13 43 I/O ST
RP8 17 14 44 I/O ST
RP9 18 15 1 I/O ST
RP10 21 18 8 I/O ST
RP11 22 19 9 I/O ST
RP12 23 20 10 I/O ST
RP13 24 21 11 I/O ST
RP14 25 22 14 I/O ST
RP15 26 23 15 I/O ST
RP16   25 I/O ST
RP17   26 I/O ST
RP18   27 I/O ST
RP19   36 I/O ST
RP20   37 I/O ST
RP21   38 I/O ST
RP22   2 I/O ST
RP23   3 I/O ST
RP24   4 I/O ST
RP25   5 I/O ST
RTCC 25 22 14 O  Real-Time Clock Alarm Output.
SCL1 17 14 44 I/O I
2
C I2C1 Synchronous Serial Clock Input/Output.
SCL2 7 4 24 I/O I
2
C I2C2 Synchronous Serial Clock Input/Output.
SDA1 18 15 1 I/O I
2
C I2C1 Data Input/Output.
SDA2 6 3 23 I/O I
2
C I2C2 Data Input/Output.
SOSCI 11 8 33 I ANA Secondary Oscillator/Timer1 Clock Input.
SOSCO 12 9 34 O ANA Secondary Oscillator/Timer1 Clock Output.
TABLE 1-2: PIC24FJ64GA004 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
I/O
Input
Buffer
Description
28-Pin
SPDIP/
SSOP/SOIC
28-Pin
QFN
44-Pin
QFN/TQFP
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C = I
2
C/SMBus input buffer
Note 1: Alternative multiplexing when the I2C1SEL Configuration bit is cleared.

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