# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

- 1
- 2
…
- 5
- 6
- 7
- 8
- 9
…
- 277
- 278

 2010-2013 Microchip Technology Inc. DS39881E-page 7
PIC24FJ64GA004 FAMILY
1.0 DEVICE OVERVIEW
This document contains device-specific information for
the following devices:
 PIC24FJ16GA002
 PIC24FJ32GA002
 PIC24FJ48GA002
 PIC24FJ64GA002
 PIC24FJ16GA004
 PIC24FJ32GA004
 PIC24FJ48GA004
 PIC24FJ64GA004
This family introduces a new line of Microchip devices:
a 16-bit microcontroller family with a broad peripheral
feature set and enhanced computational performance.
The PIC24FJ64GA004 family offers a new migration
option for those high-performance applications which
may be outgrowing their 8-bit platforms, but dont
require the numerical processing power of a digital
signal processor.
1.1 Core Features
1.1.1 16-BIT ARCHITECTURE
Central to all PIC24F devices is the 16-bit modified
Harvard architecture, first introduced with Microchips
dsPIC
®
Digital Signal Controllers (DSCs). The PIC24F
CPU core offers a wide range of enhancements, such as:
 16-bit data and 24-bit address paths with the
ability to move information between data and
memory spaces
 Linear addressing of up to 12 Mbytes (program
space) and 64 Kbytes (data)
 A 16-element working register array with built-in
software stack support
 A 17 x 17 hardware multiplier with support for
integer math
 Hardware support for 32 by 16-bit division
 An instruction set that supports multiple
addressing modes and is optimized for high-level
languages such as C
 Operational performance up to 16 MIPS
1.1.2 POWER-SAVING TECHNOLOGY
All of the devices in the PIC24FJ64GA004 family
incorporate a range of features that can significantly
reduce power consumption during operation. Key
items include:
 On-the-Fly Clock Switching: The device clock
can be changed under software control to the
Timer1 source or the internal, low-power RC
oscillator during operation, allowing the user to
incorporate power-saving ideas into their software
designs.
 Doze Mode Operation: When timing-sensitive
applications, such as serial communications,
require the uninterrupted operation of peripherals,
the CPU clock speed can be selectively reduced,
allowing incremental power savings without
missing a beat.
 Instruction-Based Power-Saving Modes: The
microcontroller can suspend all operations, or
selectively shut down its core while leaving its
peripherals active, with a single instruction in
software.
1.1.3 OSCILLATOR OPTIONS AND
FEATURES
All of the devices in the PIC24FJ64GA004 family offer
five different oscillator options, allowing users a range
of choices in developing application hardware. These
include:
 Two Crystal modes using crystals or ceramic
resonators.
 Two External Clock modes offering the option of a
divide-by-2 clock output.
 A Fast Internal Oscillator (FRC) with a nominal
8 MHz output, which can also be divided under
software control to provide clock speeds as low as
31 kHz.
 A Phase Lock Loop (PLL) frequency multiplier,
available to the External Oscillator modes and the
FRC oscillator, which allows clock speeds of up to
32 MHz.
 A separate internal RC oscillator (LPRC) with a
fixed 31 kHz output, which provides a low-power
option for timing-insensitive applications.
The internal oscillator block also provides a stable
reference source for the Fail-Safe Clock Monitor. This
option constantly monitors the main clock source
against a reference signal provided by the internal
oscillator and enables the controller to switch to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.

- 1
- 2
…
- 5
- 6
- 7
- 8
- 9
…
- 277
- 278