# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004 - Programmers Reference Manual

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© 2005-2011 Microchip Technology Inc. DS70157F-page 329
Section 5. Instruction Descriptions
Instruction
Descriptions
5
MULW.US
Integer 16x16-bit Unsigned-Signed Multiply with 16-bit Result
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X
Syntax: {label:} MULW.US Wb, Ws, Wnd
[Ws],
[Ws++],
[Ws--],
[++Ws],
[--Ws],
Operands: Wb ∈ [W0 ... W15]
Ws ∈ [W0 ... W15]
Wnd ∈ [W0, W2, W4 ... W12]
Operation: unsigned (Wb) * signed (Ws) → Wnd
Status Affected: None
Encoding:
1011 1000 1www wddd dppp ssss
Description: Multiply the contents of Wb with the contents of Ws, and store the result
in a working register, which must be an even numbered working register.
The Wb operand is interpreted as an unsigned integer. The Ws operand
and the result Wnd are interpreted as a two’s complement signed
integer. Register direct addressing must be used for Wb and Wnd.
Register direct or register indirect addressing may be used for Ws.
The ‘w’ bits select the address of the base register.
The ‘d’ bits select the address of the lower destination register.
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the source register.
Note 1: This instruction operates in Word mode only.
2: Wnd must be an even working register.
3: Wnd may not be W14, since W15<0> is fixed to zero.
4: The IF bit and the US<1:0> bits in the CORCON register have
no effect on this operation.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Example 1:
MULW.US W0, [W1], W2 ; Multiply W0*[W1] (unsigned-signed)
; Store the result to W2
Before
Instruction
After
Instruction
W0 C000 W0 C000
W1 2300 W1 2300
W2 00DA W2 0000
Data 2300 F000 Data 2300 F000
SR 0000 SR 0000

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