# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Family Data Sheet

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© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 149
PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
13.0 INPUT CAPTURE
The Input Capture module is useful in applications
requiring frequency (period) and pulse measurement.
The PIC24FJ16MC101/102 and PIC24FJ32MC101/
102/104 devices support up to eight input capture
channels.
The Input Capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
1. Simple Capture Event modes:
• Capture timer value on every falling edge of
input at ICx pin
• Capture timer value on every rising edge of
input at ICx pin
2. Capture timer value on every edge (rising and
falling)
3. Prescaler Capture Event modes:
• Capture timer value on every 4th rising edge
of input at ICx pin
• Capture timer value on every 16th rising
edge of input at ICx pin
Each Input Capture channel can select one of two
16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
Sleep and Idle modes
• Interrupt on Input Capture event
• 4-word FIFO buffer for capture values:
- Interrupt optionally generated after 1, 2, 3, or
4 buffer locations are filled
• Use of Input Capture to provide additional
sources of external interrupts
FIGURE 13-1: INPUT CAPTURE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the PIC24FJ16MC101/102 and
PIC24FJ32MC101/102/104 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 15. “Input
Capture” (DS39701) in the “PIC24F
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
2: It is important to note that the
specifications in Section 26.0 “Electri-
cal Characteristics” of this data sheet,
supercede any specifications that may be
provided in PIC24F Family Reference
Manual sections.
3: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
ICxBUF
ICx Pin
ICM<2:0> (ICxCON<2:0>)
Mode Select
3
1 0
Set Flag ICxIF
(in IFSn Register)
TMR2 TMR3
Edge Detection Logic
16
16
FIFO
R/W
Logic
ICxI<1:0>
ICOV, ICBNE (ICxCON<4:3>)
ICxCON
Interrupt
Logic
System Bus
From 16-bit Timers
ICTMR
(ICxCON<7>)
FIFO
Prescaler
Counter
(1, 4, 16)
and
Clock Synchronizer
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.

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