# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ32MC10X -- Program Memory

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© 2007 Microchip Technology Inc. Advance Information DS39715A-page 4-5
Section 4. Program Memory
Program
Memory
4
For table instructions, program memory can be regarded as two, 16-bit word-wide address
spaces, residing side by side, each with the same address range as shown in Figure 4-4.
TBLRDL and TBLWTL access the lsw of the program memory, and TBLRDH and TBLWTH access
the upper word. As program memory is only 24 bits wide, the upper byte from this latter space
does not exist, though it is addressable. It is, therefore, termed the ‘phantom’ byte.
Figure 4-4: High and Low Address Regions for Table Operations
4.3.2 Table Address Generation
For all table instructions, a W register address value is concatenated with the 8-bit Table Page
Address Pointer, TBLPAG, to form a 23-bit effective program space address, plus a byte select
bit, as shown in Figure 4-5. As there are 15 bits of program space address, provided from the
W register, the data table page in program memory is, therefore, 32K words.
Figure 4-5: Address Generation for Table Operations
0816
PC Address
0x000100
0x000102
0x000104
0x000106
23
00000000
00000000
00000000
00000000
Program Memory
‘Phantom’ Byte
(Read as ‘0’)
‘HIGH’ Table Address Range ‘LOW’ Table Address Range
TBLPAG
8 bits from TBLPAG
EA
EA<0> Selects Byte
24-bit EA
TBLPAG<7> Selects
User/Configuration
Space
01507
16 bits from Wn

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