# Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

### Protego

# PIC24FJ64GA004

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 2010-2013 Microchip Technology Inc. DS39881E-page 79
PIC24FJ64GA004 FAMILY
REGISTER 7-16: IPC1: INTERRUPT PRIORITY CONTROL REGISTER 1
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
 T2IP2 T2IP1 T2IP0  OC2IP2 OC2IP1 OC2IP0
bit 15 bit 8
U-0 R/W-1 R/W-0 R/W-0 U-0 U-0 U-0 U-0
 IC2IP2 IC2IP1 IC2IP0    
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR 1 = Bit is set 0 = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as 0
bit 14-12 T2IP<2:0>: Timer2 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)



001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 11 Unimplemented: Read as 0
bit 10-8 OC2IP<2:0>: Output Compare Channel 2 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)



001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as 0
bit 6-4 IC2IP<2:0>: Input Capture Channel 2 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)



001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 3-0 Unimplemented: Read as 0

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